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Driving Higher PV Inverter Efficiencies through a Customizable System-on-Chip

With increasing market demands for highly efficient and reliable PV systems, designers are facing many challenges. SoC platforms help designers to deal with such challenges by reducing many of the board-level parasitics and by allowing for more compact, low cost, low power solutions. Microsemi takes SoC to a new level by introducing the world’s first customizable SoC. Microsemi’s SmartFusion cSoC combines a flash FPGA core, a hard ARM Cortex-M3 processor and programmable analog to give integration of control, sensing and power management and communications functions into a … Read More → "Driving Higher PV Inverter Efficiencies through a Customizable System-on-Chip"

Like a Thunderbolt from the Blue

You know the old story about closing the patent office because everything had already been invented?

Well, we can shut down the embedded-microprocessor industry now. We’ve officially reached the end of the line. Everything that can have a processor chip embedded into it finally has. We’ve got chips in dogs, chips in T-shirts, and chips in legal documents. And now, thanks to Intersil, we’re embedding actual microprocessor chips in copper wire.

That’s it. We’re done.

Even though the patent-office story was never true, I’m pretty sure Intersil … Read More → "Like a Thunderbolt from the Blue"

Soft Everything

We talk a lot in these pages about programmable this and programmable that. In our efforts to make slivers of silicon do our increasingly complex bidding, we need some way to communicate our intent to our chips and to incite them to behave accordingly. In our happy little engineering silos, of course, we separate all these types of “programming” out into various disciplines – firmware, middleware, OS, application software, drivers, FPGA fabric, analog configurations, transceiver settings… The list goes on and on.  

All of this “programming” ultimately determines the behavior of our device. We create tribes of “engineers … Read More → "Soft Everything"

The New Silicon Productivity Gap

Scaling is a wonderful thing. As we’ve been able to put more and more transistors in less and less space, all we have to do is plot the magnificence of the single-chip mega-widgetry we’ll be able to create in the years to come, and the prospects get our salivary glands going.

So, flush with the promise of the upcoming grandeur of things to be, we march on with visions of digital sugarplums dancing in our heads. Until one of those annoying guys in the meeting – you know, the one who’s always trying to toss … Read More → "The New Silicon Productivity Gap"

New Episode – Design Starts and Revisions – Designing With Altium Series

Altium has many customers using Altium’s tools to help overcome their design challenges. Altium’s tools support a unified design approach, bringing together many aspects of designing electronics, with a high-integrity design-data management platform.

Altium is currently in the process of developing the methodology that they believe will harness the new generation of Altium Designer. They call this “Vault-Driven Electronics Design”. This methodology represents a work-flow and approach centered around Altium Vaults that will help design engineers using Altium software and systems to develop better electronics more efficiently and of a higher quality. It requires … Read More → "New Episode – Design Starts and Revisions – Designing With Altium Series"

Revitalizing the Chip Startup Environment

[Editor’s note: this is the second in a series of articles on revitalizing the chip environment in Silicon Valley. You can find the first article here.]

One of the central tenets of the Lean Chip Startup (LCS) model is frequently executed rapid hypothesis testing to ensure that a minimum viable product is developed – a product that has all the necessary features and capabilities (and nothing superfluous) to meet the requirements of 80% of the mainstream customer base. Since chips are hardware, and it … Read More → "Revitalizing the Chip Startup Environment"

An Object Lesson

Objects are bad, some say.

Material possessions, things, belongings – they detract from the true essence of being, some say.

They are to be shed, released; life is to be lived minimally, ascetically, some say.

And yet, objects can make life more livable; they can be used for good. Perhaps there’s a balance between the desire for objects and the need to occupy a small footprint and live sparingly.

This has been the embedded software conundrum for years, with the preponderance of behavior leaning towards the minimalist side: no objects. C … Read More → "An Object Lesson"

Who’s the Competition Now?

Life is simple in a duopoly.

They say that nothing unites people more than a common enemy. If you want everyone in your company to be motivated and working toward one common goal, nothing is more powerful than a single, identifiable competitor at whom you can unleash the full force of your company’s competitive fury. The singularity of vision required for good teamwork is supplied for you – almost by magic. People do not have to believe in some abstract vision of the future handed down from executive management of dubious origin and questionable motives. Rather, they … Read More → "Who’s the Competition Now?"

More Ears for Better Sound

Let’s say you’re going to a rock concert that you know is being recorded for a live album. OK, live CD. No, never mind, a live MP3. (Who needs all those highs and lows anyway?) Of course you know that the instruments will be miked. And not just with one big-ol’ sensitive mike; each instrument (well, the ones that aren’t direct plug-in, anyway) and voice will have its own mike allowing the channels to be mixed and balanced both at the show and afterwards in post-production.

You might also find mikes hanging over the … Read More → "More Ears for Better Sound"

Integrating High-Level Synthesis Designs into SoCs with Less Effort and Risk

High-Level Synthesis (HLS) has many benefits for integrated circuit design but also introduces challenges for integration into SoCs. This paper proposes solutions that improve HLS system integration by eliminating manual interface specification, reducing debug and allow system integration and verification tasks to be performed earlier. By enabling an HLS to SoC flow from a model-based design environment, these methods increase productivity and eliminate manual effort, errors and risk.

Read More → "Integrating High-Level Synthesis Designs into SoCs with Less Effort and Risk"
featured blogs
Apr 24, 2026
A thought experiment in curiosity, confusion, and cosmic consequences....