Articles – Page 219

March 12, 2013

If you have a visit with Xilinx and Altera these days and ask them about FPGA design methods above and beyond RTL, you’ll get very different answers. Xilinx will tell you they’re having great success with high-level synthesis (HLS). Altera will tell you that OpenCL is the wave of the future. Both sides make compelling arguments, which sound like they have nothing whatsoever in common. What does it all mean?

We all know that RTL design is tedious, complicated, and inefficient. We’ve known it for twenty years, in fact. To … Read More → "HLS versus OpenCL"

Extending Silicon Convergence with Technology Innovations at 20nm

by Bryon Moyer

March 11, 2013

Altera’s technology innovations in 20 nm devices will move customers’ designs up the silicon convergence continuum by providing them the ultimate system-integration platform to achieve unprecedented levels of performance, bandwidth, and power efficiency. These innovations will be delivered in a mixed-system fabric that brings together FPGA hardware and software flexibility along with the efficiencies of application-specific hard IP in a single device. Altera’s innovations in the mixed-system fabric are enabling customers to create differentiated system designs.

… Read More →

Extending Transceiver Leadership at 28nm

by Bryon Moyer

March 11, 2013

High-speed serial protocols with increased data rates and expanded capabilities are addressing the demand for more network bandwidth. Efficiently addressing the subsequent increase in system bandwidth by attaining higher data rates and achieving greater integration is becoming an ever-greater challenge. This challenge includes targeting lower bit error ratios (BERs) and ensuring signal and power integrity while maintaining power efficiency and optimizing design productivity. This white paper explores transceiver architecture in Altera® 28 nm FPGAs for applications at 10 to 28 Gbps, and highlights the architectural advantages for making high performance systems with low BER.</ … Read More → "Extending Transceiver Leadership at 28nm"

Automotive Vision

by Bryon Moyer

March 11, 2013

When you head out onto the road, your car is managed by a sophisticated parallel processor: your brain. That computing engine is able to do an amazing number of things all at the same time, so much so that we’re still not sure how it works.

And many things have to be done in parallel when you drive a car. Obviously, you have to be able to actuate the various controls – steering and working clutch and accelerator together. You need to observe all manner of threats around you – that pothole, the soccer ball that’s rolling … Read More → "Automotive Vision"

Sinking the Itanic

Why is Intel’s Fastest Processor Also Its Biggest Failure?

by Jim Turley

March 6, 2013

“This is the way the world ends / Not with a bang but a whimper.” Those last lines from T. S. Eliot’s The Hollow Men were written about war, but could just as easily apply to one of the biggest failures in electronics engineering.

Actually, I shouldn’t say the project failed. The engineering part was actually pretty successful. It was a commercial failure. “The operation was a success, although the patient died,” goes the old surgeon’s joke. And so it is with Itanium.

Fans of heavy metal will know … Read More → "Sinking the Itanic"

FPGA Wars

It’s Getting Hot at the Top

by Kevin Morris

March 5, 2013

The FPGA market is, in many ways, a microcosm of the explosive and volatile semiconductor industry. FPGAs leapt to the front of the line in new process technologies about a decade ago – assuming the role of canaries in the Moore’s Law mines. Every time the semiconductor industry managed to reach a new technological milestone, FPGA companies raced to get the first devices to market – in order to capitalize on the bounty of the new node.

Unlike other semiconductor devices – processors, memory, etc. – FPGAs are in a unique position to take maximum advantage … Read More → "FPGA Wars"

An Actual Carbon Circuit

by Bryon Moyer

March 4, 2013

Go to any of the many semiconductor-related conferences, and you’ll see talk upon talk about 20- and 14-nm technologies. About planar transistors flipping up on their sides to create a sea of fins worse than your worst post-Jaws nightmare. About those fins subdividing into nanowires. And all of the permutations and combinations of every aspect of every step of every process involved in building usable beasts out of silicon.

But try to find some higher open ground so that you can get above all of this jostling. If you look hard way off in the distance, … Read More → "An Actual Carbon Circuit"

An Independent Evaluation of Floating-Point DSP Energy Efficiency on Altera 28nm FPGAs

by Bryon Moyer

March 4, 2013

Altera recently introduced a floating-point design flow intended to streamline the process of implementing floating-point DSP algorithms on Altera FPGAs, and to enable those designs to achieve higher performance and resource usage efficiency than previously possible. BDTI performed an independent evaluation of the power consumption and energy efficiency of Altera FPGAs for demanding floating-point DSP applications. This white paper presents BDTI’s findings from this evaluation.

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SmartFusion2 Lowest Power FPGAs

by Bryon Moyer

February 27, 2013

The SmartFusion®2 system-on-chip (SoC) FPGA is differentiated from other FPGAs by its low power capabilities that enable orders of magnitude lower power operation for low duty cycle applications. The device family includes important low power features:

• Industry’s lowest static power

• Flash*Freeze real-time low power state

• ARM® Cortex™-M3 low power modes

• SoC peripheral low power modes

Read More → "SmartFusion2 Lowest Power FPGAs"

A Tailored Approach to FPGA Process Selection

by Bryon Moyer

February 27, 2013

This white paper examines three categories of process characteristics, relates them to the internal structure of modern FPGAs, and then, in turn, looks at the impact the FPGAs have on the systems that employ them. In particular, a focus on the deployment of so-called FinFET transistors shows how Altera is exploiting Intel’s 14 nm Tri-Gate process to achieve a level of FPGA density, performance, and power efficiency not reachable at all on the planar FET roadmap.

… Read More →