Articles – Page 120

September 4, 2018

It’s midnight; do you know what your IoT device is doing right now?

You do all the right things when designing your gadget: you do extensive verification; you build in some communication security stuff for secure connections; you even disable the debug port when not in use by an authorized repairperson. But… after you ship it, how do you know that it’s not being compromised?

The answer may be that you don’t know; you just have faith, based on the safeguards … Read More → "A Roll of the DICE"

Did Nantero Just Slam the Coffin Lid on DRAMs?

Moore’s Law – Dead. Dennard Scaling – Dead. DRAMs – Dead???

by Steven Leibson

August 30, 2018

Intel finally succeeded in making a workable DRAM, the 1103, in 1970, and by 1972, magnetic-core memory was on its way out after a 20-year reign as the only memory of choice for mainframes and minicomputers. Compared to DRAM, core memory was slow and expensive. Access times were on the order of microseconds, and attempts to automate core-plane production met with very limited success. They remained hand-woven until the end.

One of the first computers to use DRAM as main memory was the HP 9830 “desktop calculator” developed by a renegade design team in … Read More → "Did Nantero Just Slam the Coffin Lid on DRAMs?"

Xilinx Puts a Feather in its ACAP

Final block in Xilinx’s 7nm Everest Architecture is Detailed at Hot Chips 30 in Cupertino

by Steven Leibson

August 29, 2018

He stuck a feather in his cap and called it macaroni – Yankee Doodle

CEO Victor Peng announced Xilinx’s 7nm Everest architecture, dubbed ACAP (the Adaptable Computing Acceleration Platform), earlier this year in March. (See Kevin Morris’ “Xilinx Previews Next Generation: What the Heck is ACAP?”) Peng walked through the block diagram in detail, with one exception. That exception was a bright, Xilinx-red block labeled “HW/SW Programmable Engine,” which appears … Read More → "Xilinx Puts a Feather in its ACAP"

News Flash: ARM Still Designing CPUs

Company’s Processor Roadmap is, uh, Vague

by Jim Turley

August 28, 2018

“I looked up my family tree and found out I was the sap.” – Rodney Dangerfield

The tease looked promising enough. “ARM will be making an announcement… that will redefine the user experience… while maintaining industry-leading efficiency…” Hey, that sounds like a big deal! Sign me up.

Being the savvy and well-connected journalist that I am, I ducked out of the standard press conference for mainstream journos who can barely spell CPU, and instead finagled a private one-on-one with the product manager. ARM was happy to agree, … Read More → "News Flash: ARM Still Designing CPUs"

Certifying the Certifier

OneSpin Talks About the Extra Burden of Proof

by Bryon Moyer

August 27, 2018

OK, people: it’s time to talk again about how not to hurt or kill people (or other living things) with electronic gadgetry. Or more-than-gadgetry, like cars that have the temerity to drive themselves. There are so many angles from which to approach how all those functions in such machines can be made safe; we take on yet another one today.

This discussion stems from a conversation with OneSpin at this summer’s DAC. Seems like it was just about this time … Read More → "Certifying the Certifier"

FPGAs in Intel-Land

Intel PSG’s Dan McNamara Describes the Transition from Altera to Intel and Intel’s Acquisition of eASIC

by Steven Leibson

August 23, 2018

It’s all about the monetizing of the Xeon.” – Dan McNamara, Intel PSG

Intel’s Data-Centric Innovation Summit, held earlier this month at Intel’s Santa Clara HQ, incorporated a lot of talk about the role of Intel’s FPGA products in the “great scheme of things.” Last week, I discussed the FPGA market with $8 billion in annual sales that Intel’s targeting—see “The New, New Intel Unleashes a Technology Barrage”—but that’s hardly the full story for Intel’s … Read More → "FPGAs in Intel-Land"

Birth of the AI Machine

Digital Design is New Again

by Kevin Morris

August 22, 2018

The dawn of artificial intelligence has ironically coincided with the dusk of Moore’s Law. Just as our collective engineering genius begins to wane on the task of exponential improvements in the performance and efficiency of von Neumann processors, those processors reach a point where they can do a rudimentary job on artificial intelligence applications. Apparently something in the cosmos either has a sinister sense of irony, or the universe is warning us not to cause the rise of the machines.

Chip designers, however, welcome our … Read More → "Birth of the AI Machine"

OneDrive Down the Road to Madness

Microsoft’s Cloud Service Leaves a Lot to be Desired

by Jim Turley

August 21, 2018

“The future is already here — it’s just not very evenly distributed.” – William Gibson

“OneDrive is up to date,” it says on my screen. Nothing could be further from the truth.

Look, I like Microsoft. I really do. It’s easy to bash the software giant, but I’ve always kinda preferred using Windows systems for work. I mix it up with MacOS, Linux, iOS, FreeNAS, and various embedded OSen just to keep myself honest, but Windows is my go-to platform for getting stuff done. So, it is with some amount of tough … Read More → "OneDrive Down the Road to Madness"

Realistic Edge-Device Testing

KnowThings Stresses the System – Intentionally

by Bryon Moyer

August 20, 2018

We have so many electronic devices in our lives these days. OK, file that under “D” for “Duh!!!,” but how many different kinds do we have? Well… phones, of course. Tablets? Check… Computers? You bet.

After those, things are less obvious. A smart watch? OK… mostly that’s a phone that looks like a watch (and maybe without the phone capabilities, but… who uses a phone as a phone anymore anyway??). But OK… next? (I’m talking regular folks, not buy-all-the-techy-things folks from inside the Silicon Valley bubble…)

Where’s the CNN Synthesis?

Is EDA Missing a Market?

by Kevin Morris

August 16, 2018

The electronic design automation (EDA’s) mission has always been primarily to facilitate the design and verification of electronic circuits. EDA began, of course, with companies like Mentor, Daisy, and Valid providing specialized software for capturing and editing schematic drawings. These tools took the native human-readable language of the designer: schematics, and created the fundamental machine-readable structure of EDA: the netlist.

In the four decades since, EDA has not strayed far from that path, conceptually. The job just got tougher. Moore’s Law took complexity through the roof, for logic … Read More → "Where’s the CNN Synthesis?"