feature article
Subscribe Now

Lattice Powers-up Industry 4.0

Introduces Automate Solution Stack

Lattice Semiconductor has hit their stride, smoothly executing the strategy they laid out a couple of years ago. In the wake of a failed acquisition, the company turned the page, re-focused, and set a course to make their FPGA technology accessible to a broad range of engineering teams designing high-value applications. It’s a solid strategy – bundling their devices with full-stack solutions including hardware, hardware and software IP, software design and customization tools, reference designs, and design services – everything a typical team would need to quickly get an FPGA-based solution up and running, even with no FPGA expertise on the team.

The company has rolled out new solutions at a steady cadence, and the most recent – “Lattice Automate Solution Stack,” is aimed at industrial automation and robotics applications. “Lattice Automate” follows “Lattice sensAI” (for AI inference with sensor data), “Lattice mVision” (for low-power video and embedded vision analytics), and “Lattice Sentry” (for deploying NIST SP800-193-compliant, FPGA-based Platform Firmware Resiliency (PFR) Root of Trust). All of these solutions are configurable to take advantage of multiple Lattice devices from the MachXO3D, Mach-NX, CrossLink-NX, ECP5 / ECP5-5G, and/or iCE40 UltraPlus families.

According to the company, Lattice Automate “provides Industrial Automation system designers with tools needed to evaluate, develop, and deploy FPGA-based, programmable Industrial Automation applications, such as robotics, scalable multi-channel motor control with predictive maintenance, and real-time Industrial Networking.”

This puts Lattice Automate in the arena with a wide range of industrial SoC chips targeted at these same industrial automation applications. The difference, of course, is that Lattice’s solution brings with it the power and flexibility of FPGAs, while getting around the requirement for the engineering team to have FPGA design experts on board. At a high level, this means the solution can minimize power consumption for challenging tasks, provide flexibility in interfaces and application architecture, and can generate significant performance advantages with lower power consumption. 

At rollout, Lattice has focused on using the Automate stack for scalable brushless motor control, predictive maintenance, and embedded real-time industrial networking via Ethernet. The hardware layer of the stack takes advantage of the Certus-NX and MachXO3D device families, with RISC-V-based embedded processing systems constructed via the Lattice Propel configuration tool. The combination of the low-power embedded processor with acceleration of key tasks in the FPGA fabric creates a flexible heterogeneous computing platform for edge IIoT systems.

Starting with motor control, a reference system for multi-channel networked motor control with AI-based predictive maintenance has been pre-designed for rapid deployment. Each motor is controlled by a Certus-NX Versa Board, and multiple nodes can be, connected via Lattice’s Ether Connect networking to a controller Versa Board which manages communication with a host PC running the application and monitoring software. 

This is a robust example that extends beyond the typical “demo” or “reference design” that often accompanies development kits, and is designed to get at least a generic version of the application up and running in very little time, with no FPGA development required. A GUI-based user interface for system monitoring and control is supplied, and the predictive maintenance capabilities are designed to monitor waveforms from multiple motors with AI-based analysis and fault detection. The Nexus FPGA is used as a central controller, networked via Lattice’s Ether Connect.

There is a lot to unpack there, so let’s start with the underlying FPGA itself. The Certus-NX combines 39K logic cells, 2.9 Mb embedded memory, 56 18 x 18 multipliers, 192 programmable I/O, one lane of 5 Gbps PCIe, two lanes of 1.25 Gbps SGMII (Gigabit Ethernet), two ADCs (each 12-bit, 1 MSPS). The devices are fabricated on 28nm FD-SOI semiconductor process, bringing low power, high performance, and industrial-grade reliability – with particularly robust soft-error resistance. Lattice claims 75% reduction in power consumption vs devices fabricated on bulk CMOS processes. The large RAM blocks and multipliers are tuned for implementation of common AI inference algorithms (such as the predictive maintenance operations mentioned above), and the generous IO configuration gives a lot of options for industrial connectivity.

Lattice plops the Certus-NX down on the Versa Evaluation board using a 256-BGA package. The board provides a PCIe 2.0 endpoint edge connector, two Gigabit Ethernet ports, DDR3L-18661 memory (MT41K64M16TW-107:J from Micron), quad SPI flash (MT25QU128ABA1ESE-0SIT from Micron), three 12-pin Pmod™ connectors for expandability, two camera sensors (one using soft D-PHY interface, and another using parallel interface), multiple clock sources, USB-B connection for device programming and I2C, Four input DIP switches, five push buttons, eight status LEDs and one 7-segment LED. We have written about Certus-NX in detail before.

Lattice Propel provides a set of tools that can implement RISC-V-based embedded processor subsystems in the Certus-NX device, and facilitates creation, analysis, compilation, and debug iof both the hardware design, and the software design for that processor system. Propel includes a drag-and-drop interface for instantiating system components, and facilitates correct-by-construction design. The SDK includes SW/HW debugging capabilities along with software libraries and board support packages. We have also written in more detail about Propel before.

Lattice appears to be thriving as a result of their current strategy. The company says it has tripled its new product introduction cadence and has achieved record financial results. Lattice is expected to unveil the latest member of the Nexus platform – CertusPro™-NX, next month, and their Avant mid-range FPGA platform, in the second half of next year. 

It will be interesting to watch Lattice continue to evolve their strategy and deploy new solutions for a variety of markets. By making the transition from component company to solutions supplier, they have expanded their available markets and applications well beyond the traditional FPGA segment, and it seems to be paying off. 

 

One thought on “Lattice Powers-up Industry 4.0”

Leave a Reply

featured blogs
Jul 6, 2022
With the DRAM fabrication advancing from 1x to 1y to 1z and further to 1a, 1b and 1c nodes along with the DRAM device speeds going up to 8533 for Lpddr5/8800 for DDR5, Data integrity is becoming a... ...
Jul 6, 2022
Design Automation Conference (DAC) 2022 is almost here! Explore EDA and cloud design tools, autonomous systems, AI, and more with our experts in San Francisco. The post DAC 2022: A Glimpse into the World of Design Automation from the Cloud to Cryogenic Computing appeared fir...
Jun 28, 2022
Watching this video caused me to wander off into the weeds looking at a weird and wonderful collection of wheeled implementations....

featured video

Demo: Achronix Speedster7t 2D NoC vs. Traditional FPGA Routing

Sponsored by Achronix

This demonstration compares an FPGA design utilizing Achronix Speedster7t 2D Network on Chip (NoC) for routing signals with the FPGA device, versus using traditional FPGA routing. The 2D NoC provides a 40% reduction in logic resources required with 40% less compile time needed versus using traditional FPGA routing. Speedster7t FPGAs are optimized for high-bandwidth workloads and eliminate the performance bottlenecks associated with traditional FPGAs.

Subscribe to Achronix's YouTube channel for the latest videos on how to accelerate your data using FPGAs and eFPGA IP

featured paper

3 key considerations for your next-generation HMI design

Sponsored by Texas Instruments

Human-Machine Interface (HMI) designs are evolving. Learn about three key design considerations for next-generation HMI and find out how low-cost edge AI, power-efficient processing and advanced display capabilities are paving the way for new human-machine interfaces that are smart, easily deployable, and interactive.

Click to read more

featured chalk talk

Reduce Power System Needs with Multichannel Power Monitors

Sponsored by Mouser Electronics and Microchip

Power monitors can be very effective in terms of power management for a variety of designs and the use of a multichannel power monitors can not only lower your overall system power but also lower your code overhead, simplify prototyping and event detection. In this episode of Chalk Talk, Amelia Dalton chats with Mitch Polonsky from Microchip about the benefits of multichannel power monitors and how Microchip’s PAC194x and PAC195x can help you monitor your power in your next design.

Click here for more information about Microchip Technology PAC194x & PAC195x Monitors