Corporate objectives, such as increasing profits and sales revenue while utilizing R&D efficiently, are putting severe pressure on today’s design engineering teams. The resulting system level challenges-lowering the cost of new and existing products with fewer people and resources in less time-can be addressed by using a FPGA-based design philosophy. A system architecture using FPGAs as a key component not only reduces new product-development R&D costs but also the TCO of a product’s entire life cycle. Altera’s new lowest cost, lowest power devices, the Cyclone IV FPGA family, will demonstrate how FPGAs can reduce total system costs.
Introduction
Global competition and economic factors are squeezing profits and sales of today’s high-tech products, putting tremendous pressure on design engineering teams to bring to market lower cost products. Investing R&D in new product development presents two different system challenges: creating completely new products that take advantage of the latest technologies, features, or solutions available in the market, and developing them for low cost.
For high-tech companies in today’s cost-conscious and power-sensitive “green” environment, the first challenge translates into creating a completely new product with functionality not offered by anyone else, while having a lower priced entry point and/or lower power footprint. For the second challenge, the cost reduction of existing successful products is typically handled by driving down the cost of the components from the product’s BOM. Another option is for design teams to redesign the product, not for new functionality, but to achieve more significant cost reductions.
Both of these system challenges are framed by a third challenge, which is especially relevant in today’s global economic situation: utilizing R&D for new and cost-reduced products with fewer people, less budget, and less time. This white paper proposes a design philosophy that solves these three product-development challenges, as well as lowers costs throughout the product’s life cycle. This design philosophy is based on low-cost, low-power FPGAs. Although it is commonly known that FPGAs reduce the time to market for new product development, it is less well known that FPGAs reduce the TCO during a product’s full life cycle. This FPGA-based design philosophy allows design engineers to easily and quickly add new functionality to products while reducing total power consumption, cost-reduce existing products with minimal functional changes, and decrease a product’s TCO.
Cyclone IV FPGAs
Altera’s Cyclone® IV FPGAs, the lowest cost, lowest power devices with integrated transceiver options, are designed to lower the total system cost, defined as Total_system_cost=BOM_costs+board_costs+TCO. The Cyclone IV family comes in two different versions: the logic-only “E” variant and the “GX” variant with on-chip transceiver I/Os at speeds up to 3.125 Gbps. These high-speed transceivers support many serial I/O protocols, such as GbE, PCIe, CPRI, XAUI, 3G Triple-Rate SDI, Serial RapidIO®, SATA, DisplayPort, and V-by-One, that are migrating from the cutting edge to the mainstream. Cyclone IV GX FPGAs also include an embedded PCIe hard IP block that, when utilized by the design engineer, does not use any of the FPGA logic and supports more functionality than any other competing FPGA architecture.
Author: Thomas M. Schulte, Sr. Product Marketing Manager, Low Cost Products
Mr. Schulte joined Altera in 1994 and is responsible for developing marketing strategies around Altera’s Cyclone FPGA and MAX CPLD product families. He holds a BS in Electrical Engineering from Santa Clara University.
