editor's blog
Subscribe Now

Breker Supplements Simulation

We’ve talked about Breker’s C-level test generation tools a couple of times in the past. But the context for that discussion was simulation – the tests were run in the virtual domain.

But not all validation happens there. There are several scenarios where hardware platforms contribute to the verification plan. Emulators are one good example, where programmable hardware elements implement newly-designed logic so that extensive testing that might be too slow for simulation – in particular, running software – can be performed.

Likewise, FPGA prototypes can be part of the plan. These are usually faster than an emulator implementation, but they take longer to create since they’re optimized for speed. They’re often used by software writers as a way to test software that will ultimately run on the silicon chip. But such software designers may well be interested in stressing the design with specific uses cases that their software may exercise. So some of the silicon verification can bleed over to them.

Finally, after all of the verification is done, you have an actual chip. (With all the focus on 100%-proof-that-it-works before cutting masks, it’s easy to forget that we’re actually making a real chip.) That chip must be validated to ensure that it works the way the verification plan said it would.

All of these scenarios are now supported by Breker’s TrekSoC-Si product, which complements the existing version. It means that tests generated for simulation can also be applied in all of these other phases of verification and validation.

You can find out more in their release.

Leave a Reply

featured blogs
Mar 28, 2023
In this user case, Marintek uses Fidelity Fine/Marine and Hexpress for resistance curve prediction of a planning hull and its validation against the model test cases. Team Involved End User: Eloïse Croonenborghs, Research Scientist at MARINTEK, Maritime division, Trondhe...
Mar 23, 2023
Explore AI chip architecture and learn how AI's requirements and applications shape AI optimized hardware design across processors, memory chips, and more. The post Why AI Requires a New Chip Architecture appeared first on New Horizons for Chip Design....
Mar 10, 2023
A proven guide to enable project managers to successfully take over ongoing projects and get the work done!...

featured video

First CXL 2.0 IP Interoperability Demo with Compliance Tests

Sponsored by Synopsys

In this video, Sr. R&D Engineer Rehan Iqbal, will guide you through Synopsys CXL IP passing compliance tests and demonstrating our seamless interoperability with Teladyne LeCroy Z516 Exerciser. This first-of-its-kind interoperability demo is a testament to Synopsys' commitment to delivering reliable IP solutions.

Learn more about Synopsys CXL here

featured chalk talk

Traction Inverter
Sponsored by Infineon
Not only are traction inverters integral parts of an electric drive train and vital to the vehicle motion, but they can also make a big difference when it comes to the energy efficiency and functional safety of electric vehicles. In this episode of Chalk Talk, Amelia Dalton chats with Mathew Anil from Infineon about the variety of roles that traction inverters play battery electric vehicles, how silicon carbide technology in traction inverters can reduce the size of electric car batteries and how traction inverters can also help with cost reduction, functional safety and more.
Nov 9, 2022
18,103 views