LOUISVILLE, Colo. –– May 27, 2015 –– Management Day will be held on Tuesday, June 9th, 2015 the Design Automation Conference (DAC), the premier conference devoted to the design and automation of electronic systems. Management Day provides managers with timely information to help them make decisions where business and technology intersect, and provides a unique opportunity for managers to gain insights from their peers in the industry. The 52nd DAC will be held at Moscone Center in San Francisco, Calif. from June 7- 11, 2015.
“The Internet of Things (IoT) has immense impact on the semiconductor industry: billions of devices connected to central cloud systems, devices connected to humans, and devices connected to each other. IoT covers a variety of applications, including home automation, transportation, environmental monitoring, and medical devices, to name just a few,” said Natesan Venkateswaran of IBM and Yervant Zorian of Synopsys, co-organizers of Management Day 2015. “These devices will produce massive amounts of data, necessitating innovative approaches to Big Data. Analytics will be a key part of Management Day. The design requirements result in several new approaches and innovative methods that work together to enable the network of smart devices and to ensure low power applications. The short shelf life of most IoT devices requires increased productivity and efficient design closure to meet the compressed market windows.”
Management Day is comprised of a morning and an afternoon session, and features presentations by senior managers representing a range of emerging chip companies and solution providers as well as leading experts from within and outside the EDA industry.
Session 1, from 10:30am to 12:00pm, covers Big Data Analytics in EDA.
With million+ gate designs becoming the norm rather than the exception, EDA tools are dealing with Big Data. Each tool run produces several tens or even hundreds of diagnostic reports and log files that can run to thousands of lines. Due to the sheer volume of data, useful information in these reports and log files goes unanalyzed, causing unnecessary design churn. The result is significant loss in productivity. It is high time that the EDA industry put some serious focus on analytics techniques to help with efficient design closure. This panel brings leading experts from both within and outside the EDA industry who will share their perspectives on big data strategy and implementation.
Moderator:
Ron Collett — President & CEO, NMX Global Software, Inc, Cupertino, CA.
Panelists:
- Dean Drako – CEO & President, IC Manage, Campbell, CA.
- Yaron Kretchmer – Director of Engineering, Qualcomm Technologies, San Diego, CA.
- Sanjay Mathur – Co-founder & CEO, Silicon Valley Data Science, Mountain View, CA.
- Harnhua Ng – Co-founder & Vice President of Engineering, Plunify, Singapore, Singapore
- Leon Stok – Vice President, Electronic Design Automation Technologies, IBM Corporation, Hopewell Junction, NY.
Session 2, from 2:00 to 4:00pm, covers Trade-Offs and Decision Making for Emerging Chips
Today’s emerging chips have different sets of requirements depending on their applications. The design requirements for very high volume IoT chips are very different than the ones for complex networking applications. These can significantly affect the choice of design flow, methodologies, suppliers, while meeting numerous constraints, including export compliance constraints. This session will cover the design challenges of such emerging chips using examples from IoT up to networking chips, and present corresponding management decision criteria that allow managers to make the right choices from a pool of alternate options, while complying with numerous constraints. This session feature presentations by senior managers representing a range of emerging chip companies and solution providers.
Speakers:
Mojy Chian – CEO, Silicon Cloud International, Singapore
Larry Disenhof – EDAC Export Committee Chair; Group Director, Cadence Design Systems, Inc., San Jose, CA.
Bill Eklow – Distinguished Engineer, Cisco Systems, Inc., San Jose, CA.
Karthik Laggisetty – Export Research and Compliance Specialist, Intel Corp., Santa Clara, CA.
Sohail Syed – Senior Director, Marvell Technology Group Ltd., San Jose, CA.
Management Day presentations are all in room 309 at Moscone Center. Registration is required to attend Management Day at DAC. To register please visit www.dac.com
About DAC
The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems, and for electronic design automation (EDA) and silicon solutions. A diverse worldwide community of more than 1,000 organizations attends each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives as well as researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. A highlight of DAC is its exhibition and suite area, with approximately 200 of the leading and emerging EDA, silicon, and intellectual property (IP) companies and design services providers. The conference is sponsored by the Association for Computing Machinery (ACM), the Electronic Design Automation Consortium (EDA Consortium), and the Institute of Electrical and Electronics Engineers (IEEE), and is supported by ACM’s Special Interest Group on Design.
