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BARR-C Aims to Make Us Better Programmers

“I’d spell ‘creat’ with an e.” – Ken Thompson, when asked what he’d change about Unix.

Look up “panacea” and you’ll find a bunch of C programming tools. Everyone and his dog has ideas about how to create better, more reliable C code. Use an ISO-certified compiler. Follow MISRA C guidelines. Write the comments first. Agile Programming. Energy crystals. The … Read More → "BARR-C Aims to Make Us Better Programmers"

Virtual Verification Smorgasbord

Pull up a chair. Take a taste. Come join us. Life is so endlessly delicious. — Ruth Reichl

Are you ready for a virtual buffet of verification goodness? I hope so. In this week’s Fish Fry, we’re gobbling down as much verification as we possibly can fit on our podcastin’ plate. First up, Anupam Bakshi (Agnisys) joins us to dish on register specification, automatic … Read More → "Virtual Verification Smorgasbord"

The Challenge of Systemic Complexity

We’re tackling the multi-faceted challenges of embedded software development in this week’s episode of Amelia’s Weekly Fish Fry. Simon Davidmann (CEO – Imperas) joins us to discuss how familiar debug environments can make all the difference in complex designs and why RISC-V architecture is gaining traction in the EE ecosystem. Next up, Rupert Baines (CEO – UltraSoC) joins us to chat about the details of their “Smart Monitor” … Read More → "The Challenge of Systemic Complexity"

RISC-V Aims for World Domination

“One day you wake up and realize the world can be conquered…” – Austin Grossman

Dr. David Patterson, the newest recipient of the ACM’s A.M. Turing Award along with John Hennessy, launched into his opening remarks during his talk about the past, present, and future of processor and ISA (instruction set architecture) design at the annual dinner meeting of the < … Read More → "RISC-V Aims for World Domination"

Is AI the Killer FPGA Application?

Ross Freeman, co-founder of Xilinx, invented the FPGA in 1984. In the 34 years that have passed, FPGAs have been wildly successful and are certainly among the most important electronic devices ever conceived. But during that entire history, tracing the evolution of FPGAs from dozens of LUTs to millions, the FPGA has been the optimal solution for … exactly zero applications.

Don’t get me wrong. FPGAs do one thing … Read More → "Is AI the Killer FPGA Application?"

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featured blogs
Aug 18, 2018
Once upon a time, the Santa Clara Valley was called the Valley of Heart'€™s Delight; the main industry was growing prunes; and there were orchards filled with apricot and cherry trees all over the place. Then in 1955, a future Nobel Prize winner named William Shockley moved...
Aug 17, 2018
Samtec’s growing portfolio of high-performance Silicon-to-Silicon'„¢ Applications Solutions answer the design challenges of routing 56 Gbps signals through a system. However, finding the ideal solution in a single-click probably is an obstacle. Samtec last updated the...
Aug 17, 2018
If you read my post Who Put the Silicon in Silicon Valley? then you know my conclusion: Let's go with Shockley. He invented the transistor, came here, hired a bunch of young PhDs, and sent them out (by accident, not design) to create the companies, that created the compa...
Aug 16, 2018
All of the little details were squared up when the check-plots came out for "final" review. Those same preliminary files were shared with the fab and assembly units and, of course, the vendors have c...
Jul 30, 2018
As discussed in part 1 of this blog post, each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store its configuration bits. The time required to pr...
chalk talks
Renesas Synergy™ Platform – Mouser and Renesas IoT product development can have a lot of hidden costs and schedule traps. To get your project done on time and on budget, you really need a centralized development environment that can bring the design flow under control. In this episode of Chalk Talk, Amelia Dalton chats with Henrik Flodell of Renesas about how … Read More → "Renesas Synergy™ Platform – Mouser and Renesas"
GUI Made Easy: Modernize Your Embedded Application in Minutes – Mouser and NXPIs your embedded application struggling with a 1990s user interface? It doesn’t have to be. Developing a clean, attractive, modern user interfaces can be easy if you have the right tools. In this episode of Chalk Talk, Amelia Dalton chats with Brendon Slade of NXP about how to modernize your embedded application GUI – in … Read More → "GUI Made Easy: Modernize Your Embedded Application in Minutes – Mouser and NXP"
Simulating Systems with PSpiceSimple simulation just doesn't cut it with today's complex board designs. To manage the tradeoff between accuracy and performance, you need a variety of models with multiple levels of abstraction. In this episode of Chalk Talk, Amelia Dalton chats with Parag Choudhary of Cadence Design Systems about simulating with PSpice.
Synplify FPGA SynthesisToday’s FPGAs demand a lot from your design tool environment, particularly when it comes to synthesis. With larger designs, more third-party IP, globally-distributed design teams, and increasing performance and power challenges, the demands on synthesis technology are greater than ever. In this episode of Chalk Talk, Amelia Dalton chats with Joe Mallett of Synopsys about … Read More → "Synplify FPGA Synthesis"
Vivado Design Suite HLx EditionsHigh-level design methods can dramatically increase your productivity. Now that technologies like high-level synthesis (HLS) have gone mainstream, we can make some serious improvements to our FPGA design process. In this episode of Chalk Talk, Amelia Dalton chats with Tim Vanevenhoven of Xilinx about how the new HLx editions of Vivado Design suite are taking high-level design mainstream.
Stratus™ High-Level SynthesisHigh-Level Synthesis (HLS) has been gaining traction in the mainstream for the past couple of years. But, HLS is good for a lot more than just increasing development productivity. In this episode of Chalk Talk, Amelia Dalton chats with David Pursley of Cadence Designs Systems about the new Stratus High-Level Synthesis technology, and how it … Read More → "Stratus™ High-Level Synthesis"