Networking engineers are some of the best and brightest among us. There are good reasons for this. Designing networking equipment is a demanding discipline, spanning a wide gamut of areas from analog and signal integrity to digital design to software – and integrating all of these elements at something near their maximum performance potential. In order to get a competitive piece of network hardware out the door, you are literally designing at the bleeding edge of everything.
One problem common to all bleeding-edge engineering domains is a lack of tools. While the B and C students cruise along in their daily lives supported by a robust ecosystem of pre-designed engineering tools that do half of their job for them, the A+ engineers who live on the edge typically do not have the luxury of advanced productivity tools. When you’re the first explorer on the new frontier, nobody has arrived before you to build roads. It’s as simple as that.
Packet Plus is ready to break that mold. They are bringing a system to market that gives the networking engineer a robust set of control, analysis, and debugging capabilities that have never been available in the rare air of new protocols and high-performance packet processing. If you work on the design of networking hardware, these tools could well become your new best friends at work.
If you want to know what Packet Plus will do for your job designing and debugging your packet-processing hardware, get up from your desk and walk down the cube row… Find one of the software engineers who work at your company. Introduce yourself and make friends (this may be the most difficult part). Next, get the software engineer to show you their IDE. If you’ve never done software before, be prepared to be amazed. When they have a bug in their code, they can set breakpoints, stop, single step, go backward, push new data into registers, examine variables and memory… in short, they have debugging superpowers.
Now, go back to your own desk. I’m guessing, (and I’m not really going out on a limb here) that you have no such superpowers. Zero. OK, you may have a tiny bit of debug superpowers, but nothing like the software dude down the hall. What you probably have today is a home-grown test harness that blasts a bunch of packets through your FPGA prototype board, creates a big ’ol log file, and then lets you poke around in the debris field to figure out what happened. I’ll further guess (and I am going out on a little bit of a limb here) that the person who put together that home-grown test harness is one of your junior engineers who didn’t know what they were getting into when they found out their first project was to put together the stuff to evaluate and debug your prototype hardware.
Are we right so far?
Enter Packet Plus – a company who, for whatever reason, has heard your cries and has descended from the ether to hand you a full-fledged debugging, control, and analysis tool that might even make your new software buddy jealous. It works just like his IDE, only it speaks your language: Packets. Through the magic of Packet Plus, you can interact with your live system on a packet-by-packet basis. You can set breakpoints/triggers, single-packet step, and observe every bit of data within your design – at any protocol level. You can directly edit packets still in the queue and see the results of your changes play out in real time. For debugging packet-processing hardware, it’s everything your software engineer enjoys – with the bonus that you don’t have to stoop to writing software. OK, that was harsh. Sorry software engineers. (Hey, why are you reading this article anyway?)
Magic, eh? OK, we’ll fess up. It’s not magic. As we pointed out at the beginning of the article, you are A+ engineers and don’t believe in magic. Fair enough. Packet Plus delivers to your desktop a box called the P+ 1000 Embedded Packet Debugger. Not a catchy name, is it? These guys are serious nerds, with no time or penchant for fancy marketing names. The P+ 1000 hooks up to your prototype hardware (most likely an FPGA board), to a PC for control and diagnostics, as well as to things like logic analyzers and spectrum analyzers. Yep, that logic analyzer that’s been gathering dust because you had no way to hook in the probes, you can bring it back out again.
Now, if you’re thinking of forwarding this article to your QA team and going back to browsing your Dilbert book from 1995, hang on a minute. You’re missing the point. This tool is actually meant for design engineers. Instead of doing your debug iterations through long loops of setup, run, log, analyze, change, re-build, setup – ad nauseum, you can get right in and get your virtual hands virtually dirty. You can pick and place packets, watch where they go, change the data, and watch them go again – all with a nice graphical user interface that’s worlds ahead of that script your junior team member wrote – even when his script is working. You can do this work at any protocol level you choose. (We think most of you will choose 2). Unlike the software IDE we were discussing, you can even insert new packets into the stream. This is much more than a protocol analyzer. Yes, the QA folks might like it and may even want to give it a go someday, but for now this should probably be your little secret.
We’ve talked about the P+ 1000 box, but I hear you already asking how this thing hooks up to your design, and how Packet Plus gives you the level of control we’ve been discussing. Physically, the box connects to your prototype through either Ethernet, SFP fiber, or a proprietary interface. If FPGA-based prototyping boards from the Dini Group are your platform, there is a custom module that should plug you right in. Inside your design, the secret sauce is a very small IP block that, when strategically placed, controls your design and manages the packet queue while conversing with the P+ 1000 box outside. That means there is you, your PC and analysis tools, the P+ 1000 box, and your prototype (decked out with the tiny IP block inside). Fire it up and take command. You control the horizontal. You control the vertical. See? That QA kid has no idea what we’re talking about.
What if your design involves security protocols? For a nominal additional fee, Packet Plus will set you up to handle and debug those as well. Virtually any common security protocol can be supported, with at-speed operation (trigger, view, edit in the clear), and the embedded hardware block approach makes security protocol support easily extensible. With security protocol support turned on, you get encryption and decryption, key management, and programmable nonce. Not only can you debug inside of your security-enabled system, you can debug the security itself – validating, for example, that the system properly rejects an outdated key.
A nice feature of the system is that it can be used easily at your desk. You don’t have to have a huge setup in the “lab” where you are not allowed to take your can of Mt. Dew (unless it’s late at night and your lab buddy promises not to tell). It’s also cheap enough where you don’t have to buy one for the whole company to share. Starting at around $9500 a copy for an individual engineer, you’re important enough to get your own.
The reason we haven’t had a tool like this before is probably obvious. You’re not working on developing hardware for the old, well-worn protocols. You’re developing hardware for the next one – the one that isn’t out yet. By the time somebody came up with a tool for that, you’d have moved on down the road. The reason Packet Plus can help you out is that they’ve developed a protocol description language, which they use to very quickly support new protocols with their same proprietary hardware box and IP. In most cases, they should be able to come into your place and have your FPGA design up and instrumented in less than a day. In a year, when you are working on a completely different design, they can easily upgrade the system to whatever whiz-bang protocol you will be working on then.
It’s not often that we get a commercial tool designed for the cutting-edge designer. Most of the mainstream test and measurement companies are happy to bring mainstream capabilities to mainstream engineers. We find it refreshing to see something new and awesome like this for the trendsetters as well. For engineers designing today’s complex pipelined architectures for networking gear, this could be a major productivity tool once you’re in the debugging phase with a hardware prototype.