feature article
Subscribe Now

Piles of Cash – and Other Stories

How to Succeed as an FPGA Startup

Succeeding as an FPGA startup is hard.  And, by “hard” we mean completely impossible.  The odds are terrible; the opposition is staggering.  The requirements for success include top-flight semiconductor technology, a novel architecture, seasoned and capable tools, experienced AEs, a rich portfolio of proven IP, world-class engineering, major league marketing prowess… and Piles of Cash.  Nobody in their right mind would risk precious capital on such a risky venture. 

In other news, a couple weeks ago, Tabula – an FPGA startup – announced that they have secured an additional $109 million in funding – the largest amount given to a private semiconductor company in the last decade. 

Ahem.

Did somebody have their allowance burning a hole in their pocket?

If so, those “somebodys” were leading venture capital firms, including DAG, Benchmark, Greylock, NEA, and Crosslink.  Don’t worry, though.  We’re not about to start a long diatribe where we analyze the risk versus reward and the dark side of VC logic.  That’s not how we roll. 

We will, however, talk about what this means to engineers who want to use FPGAs in their designs.  While there are a number of loud and lingering questions about Tabula’s “spacetime” architecture – not the least of which is that their 3D ABAX FPGAs are… not 3D, the fundamental value proposition remains.  Tabula can sell you a huge FPGA for about ¼ the price of comparable FPGAs from the 2 market leaders. 

Now, for those of you who do math based on a Moore’s Law curve, you may quickly observe that ¼ the price equates to about two process nodes.  You may also notice that Xilinx and Altera both ride on the very edge of “what is possible” with respect to semiconductor technology.  Xilinx just announced that the first of their 28nm FPGAs has shipped, and Altera has announced a device with a staggering 3.9 billion transistors – the most ever produced.  This means that if you’re a new FPGA company trying to differentiate yourself by a 4x architecture-level advantage, you have to be within one process node of the big two, or your advantage completely evaporates and you will be crushed like a bug on the windshield of the FPGA duopoly bus.

Tabula is currently working with 40nm technology for their ABAX parts, so they’re looking like, roughly, (fuzz your eyes a bit)… One process node behind the big 2.  That’s flirting dangerously close to the “who cares, I’m going with the proven supplier” line of FPGA-startup-death.  How do you get out of that scary place?  There are two options:  1) Buy your way out.  2) Partner. 

Another FPGA startup – Achronix, has taken option #2 (as we mentioned last year) by partnering with Intel to produce 22nm FPGAs using Intel’s latest-greatest process technology.  Tabula has gone for option 1 – which requires the above-mentioned “Piles of Cash.”  With this kind of cash infusion – and some world-class IC designers – Tabula should be able to buy their way to the latest node with a supplier like TSMC – the fab of choice for both Xilinx and Altera at the moment.  If they can do that, then their ~4x price advantage could survive, and they’d have a compelling argument to present to customers like…  Cisco. 

At about the same time as the investment announcement, Tabula also announced that one of their customers is none other than the Ace of Spades in the “most wanted FPGA customer” deck.  Cisco is probably the world’s largest consumer of FPGAs.  Winning them as a customer is a major coup for a startup like Tabula.  On the other hand, if I were at Cisco, and a startup came to me with a believable story about a 4x cost savings on one of my most expensive components, I’d probably give them a try.  Not a full-on high-volume commitment, but a test project or two to see how it goes.  If the company, the chips, and the supply-line proved themselves worthy, I’d expand the relationship.  If not, I’d consider the experiment due diligence.  We’ll see how that goes. 

As we have also discussed before, Tabula has also attacked a couple of the other traditional stumbling blocks for FPGA startups – tools and AE support – by becoming the first vendor to offer the entire design flow “in the cloud”.  This too is a promising but unproven strategy. 

What is clear is that Tabula is making bold strategy moves in order to overcome each of the traditional failure points of FPGA startups attacking the strongholds of Xilinx and Altera.  Perhaps they have learned from history.  Perhaps this time it will pay off. 

Also in the category of “FPGA Startups Who Are Not Yet Dead” are Achronix – who we just mentioned is trying to gain leverage by partnering with Intel for fab services, and Silicon Blue – who is on the opposite end of the FPGA spectrum with super-low-cost, super-low-power FPGAs aimed at the mobile device market.  You don’t hear much about Silicon Blue.  Frankly, unless you’re one of the small number of companies designing huge-volume connected mobile devices, they don’t really care.  Rather than trying to capture the breadth of the FPGA market, Silicon Blue is going after a carefully-selected, high-value audience.  They want a small number of customers who will buy gigantic volumes of cheap FPGAs.  With that, their support and tool burdens are eased, and they can focus on delivering truly great service to their select clients.  It’s yet another way to potentially overcome the FPGA startup curse.

While none of these three FPGA startups has taken even a large single digit of market share from the big two FPGA companies, they have distinguished themselves by surviving longer than almost every company who has previously attempted to enter this highly competitive market.  They have all also gone beyond the traditional “Hey, we’ve got a cool architectural innovation; let’s start an FPGA company” strategy and have actually come up with thoughtful ways of overcoming the normal failure modes of such companies. 

For those of us who use FPGAs, this is nothing but good news.  Competitive pressure and innovation will either provide us more options for FPGAs or keep the big two suppliers on their toes and looking farther than just their archrival for validation.  Either way, we get better chips with better tools and better support for less money.  What’s not to like about that?

13 thoughts on “Piles of Cash – and Other Stories”

  1. Pingback: cpns 2017
  2. Pingback: Petplay
  3. Pingback: friv
  4. Pingback: zd porn
  5. Pingback: wedding planners
  6. Pingback: friv
  7. Pingback: DMPK

Leave a Reply

featured blogs
Aug 15, 2018
https://youtu.be/6a0znbVfFJk \ Coming from the Cadence parking lot (camera Sean) Monday: Jobs: Farmer, Baker Tuesday: Jobs: Printer, Chocolate Maker Wednesday: Jobs: Programmer, Caver Thursday: Jobs: Some Lessons Learned Friday: Jobs: Five Lessons www.breakfastbytes.com Sign ...
Aug 15, 2018
VITA 57.4 FMC+ Standard As an ANSI/VITA member, Samtec supports the release of the new ANSI/VITA 57.4-2018 FPGA Mezzanine Card Plus Standard. VITA 57.4, also referred to as FMC+, expands upon the I/O capabilities defined in ANSI/VITA 57.1 FMC by adding two new connectors that...
Aug 15, 2018
The world recognizes the American healthcare system for its innovation in precision medicine, surgical techniques, medical devices, and drug development. But they'€™ve been slow to adopt 21st century t...
Aug 14, 2018
I worked at HP in Ft. Collins, Colorado back in the 1970s. It was a heady experience. We were designing and building early, pre-PC desktop computers and we owned the market back then. The division I worked for eventually migrated to 32-bit workstations, chased from the deskto...
Jul 30, 2018
As discussed in part 1 of this blog post, each instance of an Achronix Speedcore eFPGA in your ASIC or SoC design must be configured after the system powers up because Speedcore eFPGAs employ nonvolatile SRAM technology to store its configuration bits. The time required to pr...