Pentek’s Jade Architecture Module for Wideband Signal Capture and Generation Now Available

Wideband, low-latency, synchronous XMC module
Two 500 MHz 12-bit A/Ds with multiband digital down converters
Wideband digital upconverter feeds two 800 MHz 16-bit D/As
Jade Architecture with Xilinx Kintex Ultrascale FPGA offers price, power and processing performance advantages
Navigator Design Suite expedites development and custom IP integration

UPPER SADDLE RIVER, NJ?March 27, 2017?Pentek, Inc., today introduced the newest member of the Jade™ family of data converter XMC modules. The Model 71851 is based on the Xilinx Kintex Ultrascale FPGA and features two 500 MHz, 12-bit A/Ds with multiband digital down converters (DDCs), one digital upconverter (DUC) and two 800 MHz 16-bit D/As.

Application Scenario: The Model 71851 offers a well-matched 200 MHz bandwidth on both the receive-side and on the transmit-side, which provides the complimentary solution necessary in many high-speed data acquisition, waveform generation, communications, satcom, UAV and radar applications.

One high-performance application, requiring wide bandwidth signal generation and capture is a ground penetrating radar system that can detect hazards hidden below the surface. The Model 71851 can be used in a low altitude aircraft or UAV as the front-end to this type of system. The Model 71851 has the bandwidth and processing power necessary to create signals that can penetrate the ground at a greater depth and then capture return signals with greater resolution while allowing the aircraft to fly at a safe travelling velocity to eliminate detection.

“Not only do customers of the Jade Model 71851 benefit from its lower cost, lower power and additional processing power, they can slash application design time with Pentek’s Navigator development tools,” said Robert Sgandurra, director of Product Management. He added, “By listening to customer requests, Pentek has added features in the IP and software to improve the functionality of our boards, such as the new operational modes for the D/A converters in the 71851. The previous IP module was limited to feeding data to both D/A channels in tandem, but now streams for the two D/As are fed from two separate DMA engines. While retaining the previous synchronous capability, customers also start and stop each output waveform data stream independently, providing more flexibility for more advanced applications.”

A/D Converter Stage: The front end accepts two analog HF or IF inputs on front panel SSMC connectors with transformer-coupling into two Texas Instruments ADS5463 500 MHz, 12-bit A/D converters. Optionally, a Texas Instruments ADS5474 400 MHz, 14-bit A/D may be factory-installed instead of the ADS5463 for those that need better resolution. The digital outputs are delivered into the Kintex UltraScale FPGA for signal-processing, data capture and routing to other module resources.

Digital Upconverter and D/A Stage: A TI DAC5688 DUC (digital upconverter) and D/A accepts a baseband real or complex data stream from the FPGA and provides that input to the upconvert, interpolate and dual D/A stages.

Clocking and Synchronization: Two internal timing buses provide either a single clock or two different clock rates to the A/D and D/A signal paths.

Performance IP Cores:

A/D Acquisition IP Modules: The Model 71851 features two A/D Acquisition IP modules for easily capturing and moving data. Each module can receive data from any of the two A/Ds or a test signal generator. Powerful linked-list DMA engines move the A/D data through the PCIe interface in a unique Acquisition Gate Driven mode. In this mode, the length of a transfer performed by a link definition need not be known prior to data acquisition; rather, it is governed by the length of the acquisition gate. This is extremely useful in applications where an external gate drives acquisition and the exact length of that gate is not known or is likely to vary. Within each A/D Acquisition IP Module is a powerful DDC IP core. Because of the flexible input routing of the A/D Acquisition IP Modules, many different configurations can be achieved including one A/D driving both DDCs or each of the two A/Ds driving its own DDC.

D/A Waveform Generation IP Module: The Model 71851 factory-installed functions include a sophisticated D/A Waveform Playback IP module. Customers can easily generate waveforms stored in either on-board memory or host memory for both D/As. Programmable parameters including length of waveform, delay from playback trigger, waveform repetition, etc. are fully supported with a minimum of programming.

The Jade Architecture: The Pentek Jade architecture is based on the Xilinx Kintex UltraScale FPGA, which raises the digital signal processing (DSP) performance by over 50% with equally impressive reductions in cost, power dissipation and weight. As the central feature of the Jade architecture, the FPGA has access to all data and control paths, enabling factory-installed functions including data multiplexing, channel selection, data packing, gating, triggering and memory control. A 5 GB bank of DDR4 SDRAM is available for custom applications. The memory to Gen.3 x8 PCIe link can sustain 6.4 GB/s data transfers. Eight additional gigabit serial lanes and LVDS general purpose I/O lines are available for custom solutions.

Navigator Design Suite for Streamlined IP Development: Pentek’s Navigator™ Design Suite was designed from the ground up to work with Pentek’s Jade architecture and Xilinx’s.

Vivado Design Suite® providing an unparalleled plug-and-play solution to the complex task of IP and control software creation and compatibility. Graphical design entry for Xilinx and Pentek AXI4-compliant IP modules using the Xilinx IP Integrator greatly speeds development tasks. The Navigator Design Suite consists of two components: Navigator FDK (FPGA Design Kit) for integrating custom IP into Pentek sourced designs and Navigator BSP (Board Support Package) for creating host applications. Users can work efficiently at the API level for software development and with an intuitive graphical interface for IP design. The Navigator BSP is available for Windows and Linux operating systems.

Pre-Configured SPARK System Ready for Immediate Use: With a Pentek 8266 SPARK® PC, 8264 SPARK 6U VPX, or 8267 SPARK 3U VPX development system, work can begin immediately on applications. A SPARK system saves engineers time and expense associated with building and testing a development system and ensures optimum performance of Pentek boards. SPARK development systems are ready for immediate operation with software and hardware installed. In many applications, the SPARK development system can become the final deployed application platform.

Form Factors: The Model 71851 XMC module is designed to operate with the wide range of carrier boards in PCIe, 3U & 6U VPX, AMC, and 3U & 6U CompactPCI form factors, with versions for both commercial and rugged environments.

Pricing and Availability: Designed for air-cooled, conduction-cooled, and rugged operating environments, the Model 71851 XMC module with 5 GB of DDR4 SDRAM starts at $10,995 USD. A 400 MHz 14-bit A/D and additional FPGA options are available. Delivery is 10 to 12 weeks ARO.

The Navigator Design Suite consists of two packages. The Navigator BSP is $2,500 USD and the Navigator FDK is $3,500 USD.