editor's blog
Subscribe Now

Imperas Gen 2

Imperas has launched their second-generation virtual platform technology. In so doing, they’re adding more capability as well as restructuring their product offering.

We’ve been following their OVPworld approach for a few years, now, Dick Selwood having covered the technology back in 2009. What was then OVPsim has morphed into three “DEV” products – C*DEV, S*DEV, and M*DEV for microControllers, microprocessors (S=Standard), and multicore, respectively. (The * is pronounced “star.”) Each of these has the capability of generating a system model comprising any of the many model components in their library, and it comes with the simulator for executing that model.

They’ve now announced their M*SDK product, which layers new debugging and analytic capabilities on top of the DEV products. These are the typical kinds of probing and profiling tools that a software developer will want to use in optimizing code and/or platform execution. They include:

  • Code coverage
  • Memory and cache analysis
  • Execution profiling
  • Instruction and function tracing
  • Fault injection
  • Protocol verification
  • Exception and interrupt analysis
  • OS task tracing
  • OS scheduler analysis
  • Memory protection verification
  • Shared resource introspection

They’ve also extended their code morphing approach to include references to models of processors that come with their own ISS. In other words, it’s not just a model – it’s a model plus a tool. Such a tool is a slave to the overarching simulator, but can be called to deliver quick, accurate responses to simulation events. Called ToolMorphing, it not only creates the model code on the fly, but binds (for lack of a better word coming to mind right now) an associated tool for that model if there is one.

Meanwhile, the venerable OVPsim has been relegated to use as their academic product. It’s still around, but is no longer featured as a commercial focus.

You can find more information in their release.

Leave a Reply

featured blogs
Sep 21, 2018
在这我们谈论的不是您的叠层设计跟其他人比怎么样,而是您设计的 PCB 层叠结构,是刚性板、柔性板、刚...
Sep 21, 2018
  FPGA luminary David Laws has just published a well-researched blog on the Computer History Museum'€™s Web site titled '€œWho invented the Microprocessor?'€ If you'€™re wildly waving your raised hand right now, going '€œOoo, Ooo, Ooo, Call on me!'€ to get ...
Sep 20, 2018
Last week, NVIDIA announced the release of the Jetson Xavier developer kit. The Jetson Xavier, which was developed in OrCAD, is designed to help developers prototype with robots, drones, and other......
Sep 18, 2018
Samtec performs several tests in-house as part of our qualification testing on a product series; including Low Level Contact Resistance (LLCR). It measures the amount of resistance in a position on a part. LLCR is used in combination with several other tests to track the over...