industry news
Subscribe Now

UltraSoC furthers academic support with Europractice partnership

UltraSoC IP enables academic institutions to develop full RISC-V ASICs

CAMBRIDGE, UK – 4 November 2019

UltraSoC has announced a partnership with Europractice, to bring UltraSoC debug and trace IP for open source RISC-V development to a wider community and to make the company’s IP more readily and freely available for academic ASIC development. This move furthers UltraSoC’s growing support for education, particularly via the rapidly growing RISC-V open source architecture, which makes it possible for academic institutions to develop low cost solutions using open resources.

Europractice is a European Commission (EC) initiative, which assists academic and non-commercial research and teaching supporting electronic system design – specifically facilitating ASIC development through to wafer fabrication.  It supports a wide range of modern design methodologies for ICs, photonics, MEMS, FPGA and systems. Its support is available to academic institutions and publicly funded research laboratories largely in Europe. Europractice membership and access to design tools is managed by the Science and Technology Facilities Council (STFC) at the Microelectronics Support Centre, Rutherford Appleton Laboratory in the UK.

Dr John McLean from UKRI Rutherford Appleton Laboratory and Head of Europractice design tools commented: “As part of the growing RISC-V ecosystem, UltraSoC brings significant value to our Europractice academic members; we are delighted they have agreed to join our successful program. UltraSoC’s embedded analytics technology will not only allow our 600 member institutes across Europe to realize their ASIC designs more quickly and easily, but also allow them to perform detailed system-level analysis on the resulting silicon.”

Having started as a university spin-out, UltraSoC sees the value in investing in a strong connection to academic institutions and the benefits in fostering talent from universities around the world. The company has an active University Program, as part of which it also provides low-cost or free IP licenses to participating institutions, for research or pre-commercial investigation.

UltraSoC recently won a significant grant from Innovate UK for a joint industry/academia project involving the Universities of Coventry and Southampton. The project will develop the world’s first on-chip cybersecurity monitoring solution for connected and autonomous vehicles.

The company works with industry bodies such as the UK Electronics Skills Foundation and Engineering Development Trust. It is currently sponsoring two UKESF awards, to be presented at the TechWorks Awards event on 6th November, one aimed at raising awareness and building skills in embedded systems engineering. The second award (sponsored with AESIN and the UKESF) is for automotive systems, functional safety and cybersecurity.

About UltraSoC

UltraSoC is a pioneering developer of analytics and monitoring technology at the heart of the systems-on-chip (SoCs) that power today’s electronic products. The company’s embedded analytics technology allows product designers to add advanced cybersecurity, functional safety and performance tuning features; and it helps resolve critical issues such as increasing system complexity and ever-decreasing time-to-market. UltraSoC’s technology is delivered as semiconductor IP and software to customers in the consumer electronics, computing and communications industries. For more information visit www.ultrasoc.com. For more information visit www.ultrasoc.com.

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Current Sense Shunts
Sponsored by Mouser Electronics and Bourns
In this episode of Chalk Talk, Amelia Dalton and Scott Carson from Bourns talk about the what, where and how of current sense shunts. They explore the benefits that current sense shunts bring to battery management and EV charging systems and investigate how Bourns is encouraging innovation in this arena.
Jan 23, 2024
13,101 views