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Synopsys Introduces Native Automotive Solutions Optimized for Efficient Design of Autonomous Driving and ADAS SoCs

MOUNTAIN VIEW, Calif., Oct 15, 2019 /PRNewswire/ —


  • Synopsys’ native automotive solutions enable designers to efficiently implement and verify functional safety mechanisms to achieve target ASIL for safety-critical SoCs
  • Synopsys’ differentiated solutions enable designers to avoid custom scripting solutions and improve runtime, job-execution capacity, quality-of-results, and ease-of-use

Synopsys, Inc. (Nasdaq: SNPS) today announced its new native automotive solutions for more efficient system-on-chip (SoC) design. The accelerating evolution of vehicle technologies means that more automotive chips are required to satisfy higher automotive safety integrity levels (ASILs) for autonomous driving and advanced driver-assistance systems (ADAS). Synopsys’ native automotive design solutions enable designers to achieve their target ASILs by providing the industry’s most comprehensive feature set to implement functional safety (FuSa) mechanisms, such as triple-mode redundancy (TMR), dual-core lock-step (DCLS), and failsafe finite state machine (FSM).

With the differentiation available through native automotive solutions, designers can generate the industry’s first FuSa intent early in the design flow to describe safety mechanism behavior, which is used as input and maintained throughout the digital design flow. Synopsys’ native automotive solutions comprise a complete digital design flow incorporating FuSa-enabled technologies, which work together to maximize efficiency. These technologies include:

  • TestMAX FuSa performs early functional-safety analysis at RTL- or gate-level and identifies candidates for TMR or DCLS redundancy to achieve single-point fault metric (SPFM) goals for target ASIL
  • Design Compiler® NXT synthesis, IC Compiler II place-and-route, and Fusion Compiler design insert, check, and report the safety mechanisms implemented
  • Formality® equivalence checker functionally verifies that the RTL matches the netlist after redundancy or additional logic modules are inserted
  • IC Validator physical signoff verifies the layout and reports that all redundancy mechanisms are correctly implemented

“As next-generation automotive applications continue to drive market growth, designers are under increasing pressure to satisfy functional safety requirements yet still meet aggressive time-to-market goals,” said Shankar Krishnamoorthy, senior vice president of design implementation for the Design Group at Synopsys. “Synopsys now offers the industry’s first complete set of natively integrated capabilities to implement and verify functional safety mechanisms. Designers will benefit from significantly reduced time-to-market and improved quality-of-results for their safety-critical automotive designs.”

Synopsys Automotive Design Solutions
Synopsys’ comprehensive automotive design solutions deliver complex FuSa analysis, implementation, and verification capabilities. Differentiated offerings for automotive design, such as unified functional safety verification and native automotive solutions, enable designers to prove at the planning and implementation phases that their chip safety architecture can achieve target ASILs. The unified functional safety verification solution brings together best-in-class technologies for fault campaign management under a single unified cockpit. Early functional safety analysis can quickly identify candidates for TMR and DCLS redundancy and estimate metrics for target ASILs. Synopsys’ native automotive solutions provide the industry’s most comprehensive feature set to efficiently implement and verify FuSa mechanisms, such as TMR, DCLS, and failsafe FSM. Comprehensive digital/analog fault injection and simulation can be performed to produce reliable metrics for final analysis and roll-up. Synopsys also provides complete solutions to address reliability challenges, including electromigration (EM), voltage (IR) drop, device aging, and robust redundant via insertion (RVI) capabilities. Synopsys provides designers with a broad portfolio of automotive IP that is designed and tested for AEC-Q100 reliability, offers ASIL-ready ISO 26262 certification, and supports automotive quality management.

Furthermore, Synopsys’ unified functional safety verification solution includes:

  • VC Functional Safety Manager, a high-quality, scalable, and distributed FMEDA automation tool delivering the highest productivity through the FMEA/FMEDA and unified fault campaign process
  • TestMAX FuSa performs fast, early functional-safety analysis at RTL- or gate-level
  • Z01X fault simulator for fast, proven digital fault simulation
  • VC Formal FuSa App to accelerate fault classification through application of formal filtering
  • TestMAX CustomFault fault simulator delivers high-performance analog and mixed-signal fault simulation for full-chip functional safety and test coverage analysis
  • ZeBu® emulator performs fault emulation for long, software-rich tests
  • Verdi® Fault Analysis for debug, planning, and coverage, including integration with industry-leading requirement tracking tools
  • Certitude® functional qualification to demonstrate verification flow robustness in support of ISO 26262 Part 8-9 assessments

Synopsys’ native automotive solutions will be generally available in December 2019.

For more information, please visit

About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software partner for innovative companies developing the electronic products and software applications we rely on every day. As the world’s 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you’re a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at

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