industry news
Subscribe Now

Synopsys Drives Chip Innovation for Next-Generation Mobile and HPC Designs on TSMC N3E and N4P Processes

Synopsys Digital and Custom Design Flows Certified for TSMC N3E and N4P Processes and Broad Synopsys IP Portfolio Available Now

MOUNTAIN VIEW, Calif., June 13, 2022 /PRNewswire/ — Helping customers optimize performance, power and area (PPA) for next-generation system-on-chips (SoCs) used in demanding mobile and high-performance computing applications, Synopsys, Inc. (Nasdaq: SNPS) today announced that TSMC has certified the Synopsys digital and custom design flows for its industry-leading N3E and N4P process technologies. In addition, Synopsys’ leading Foundation IP and Interface IP are available now on the TSMC N3E and N4P processes to accelerate SoC development and minimize design risk. Adopted by leading customers, the digital and custom design flows and IP are based on the latest versions of TSMC’s design rule manual (DRM) and process design kits (PDKs).

“TSMC and Synopsys have successfully collaborated for decades, with the shared goal of helping our mutual customers meet the aggressive PPA demands of increasingly complex SoCs,” said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC. “By enabling Synopsys’ design solutions on TSMC’s high-performing and power-efficient N3E and N4P processes, customers can produce innovative, advanced chips for a variety of demanding, compute-intensive applications.”

Learn more about Synopsys digital and custom flows, as well as Synopsys Foundation IP and Synopsys Interface IP.

The integrated Synopsys Custom Design Family features new innovations in synthesis, place-and-route, physical verification and timing signoff, which enables the best possible PPA results and faster design closure. On the custom side, Synopsys Custom Compiler design and layout product, part of the Synopsys Custom Design Family and successfully validated by the Synopsys IP team, features enhancements that strengthen productivity for designers using TSMC’s N3E process. In addition, the Synopsys PrimeSim™ circuit simulation technology delivers required accuracy for advanced-node designs, providing signoff coverage for circuit simulation and reliability requirements.

“Our deep history of collaboration with TSMC through every process generation has enabled Synopsys to co-optimize our digital and custom design families and IP portfolio to provide compelling PPA advantages for our mutual customers,” said Sanjay Bali, vice president of marketing and strategy for the Silicon Realization Group at Synopsys. “We are seeing first-hand how companies are achieving successful designs and delivering the next level of innovation with Synopsys EDA flows and IP on TSMC’s advanced N3E and N4P processes.”

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software partner for innovative companies developing the electronic products and software applications we rely on every day. As an S&P 500 company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and offers the industry’s broadest portfolio of application security testing tools and services. Whether you’re a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing more secure, high-quality code, Synopsys has the solutions needed to deliver innovative products. Learn more at

Leave a Reply

featured blogs
Jul 1, 2022
We all look for 100% perfection and want to turn our dreams (expectations) into reality as far as we can. Are you also looking for a magic wand to turn expectation into reality? The story applies to... ...
Jun 30, 2022
Learn how AI-powered cameras and neural network image processing enable everything from smartphone portraits to machine vision and automotive safety features. The post How AI Helps Cameras See More Clearly appeared first on From Silicon To Software....
Jun 28, 2022
Watching this video caused me to wander off into the weeds looking at a weird and wonderful collection of wheeled implementations....

featured video

Demo: Achronix Speedster7t 2D NoC vs. Traditional FPGA Routing

Sponsored by Achronix

This demonstration compares an FPGA design utilizing Achronix Speedster7t 2D Network on Chip (NoC) for routing signals with the FPGA device, versus using traditional FPGA routing. The 2D NoC provides a 40% reduction in logic resources required with 40% less compile time needed versus using traditional FPGA routing. Speedster7t FPGAs are optimized for high-bandwidth workloads and eliminate the performance bottlenecks associated with traditional FPGAs.

Subscribe to Achronix's YouTube channel for the latest videos on how to accelerate your data using FPGAs and eFPGA IP

featured paper

An Engineer's Guide to Designing with Precision Amplifiers

Sponsored by Texas Instruments

Engineers face many challenges when designing analog circuits. This e-book covers common topics related to these products, including operational amplifier (op amp) specifications and printed circuit board layout issues, instrumentation amplifier linear operating regions, and electrical overstress.

Click to read more

featured chalk talk

Sensor Technologies Here to Stay: Post-pandemic

Sponsored by Infineon

Today sensor technology has become integral to our everyday lives. And in the future, sensor technology will mean even more than it does today. In this episode of Chalk Talk, Amelia Dalton chats with David Jones from Infineon about the future of sensor technologies and how they are going to impact our lives in the post-pandemic world. They investigate how miniaturization, built-in antennas in-package and the evolution of radar technology have helped usher in a whole new era of sensing technologies and how all of this and more will help us live healthier and happier lives.

Click here for more information about Infineon's sensor technology portfolio