SEGGER Releases Floating-Point Library to Support RISC-V
Monheim, Germany – February 5th, 2020
SEGGER’s stand-alone Floating-Point Library has now been extended to include an assembly-optimized variant for RISC-V implementations. The library contains a complete set of high level mathematical functions that have been written in C, and uses advanced algorithms to maximize performance levels.
All of the functionality is fully verified, for both single and double precision operations. The RISC-V variant, like the existing variant for ARM, is optimized for both high-speed operation and small code size. The balance between size and speed can be configured at library build time.
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