PISCATAWAY, N.J., USA, 14 June 2010 — The IEEE announced today the launch of Get IEEE 1685™, a website where users can download the current version of the standard free of charge. IEEE 1685™ is the first standard description of Intellectual Property blocks in highly automated design environments … Read More → "Get IEEE 1685™ Launches to Provide Industry with Free Access to Standard for Automated Design Environments"

ACTON, MASS. –– June 21, 2010 –– Carbon Design Systems today announced that TSMC added Carbon Model Studio and SoC Designer Plus to TSMC Reference Flow 11.0. 

The Carbon products used in Reference Flow 11.0 support performance and power analysis at the System (ESL) and register transfer level (RTL), and also provide a platform for pre-silicon software development.

Read More → "Carbon Design Systems Announces Performance, Power Analysis in TSMC Reference Flow 11.0"

SANTA CLARA, Calif., June 15, 2010 — Agilent Technologies Inc. (NYSE: A) today expanded its digital communications analyzer (DCA) portfolio with the introduction of the 86100D DCA-X wide-bandwidth oscilloscope. The DCA-X provides engineers with the tools needed to characterize … Read More → "Agilent Technologies Introduces Wide-Bandwidth Oscilloscope for Faster, More Accurate Characterization of High-Speed Digital Designs"

SANTA CLARA, Calif., June 14, 2010 — Agilent Technologies Inc. (NYSE: A) today announced that its SystemVue Electronic System-Level (ESL) design software, version 2010.07, will automatically generate IBIS Algorithmic Modeling Interface (IBIS-AMI) models. IBIS-AMI, a modeling standard for serializer-deserializer (SerDes) transceivers, was created to enable fast, statistically significant analysis of high-speed digital chip-to-chip links. For the first time, < … Read More → "Agilent Technologies Offers Industry’s First Automatic IBIS-AMI Model Generation Capability in an ESL Design Flow"

MOUNTAIN VIEW, Calif., June 14, 2010—Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced it is delivering an optimised, pre-validated design environment for the Common Platform alliance (CPA) 32/28 nanometer(nm) high-k metal gate (HKMG) technology based on Synopsys’ Lynx Design System. Accomplished under a multi-year collaboration with ARM and the Common Platform alliance [IBM, Samsung Electronics, Co., Ltd., GLOBALFOUNDRIES], the optimisations to the Lynx Design System and its Galaxy™ Implementation Platform-enabled flow for ARM’s advanced physical IP and the ARM Cortex™A9 MPCore … Read More → "Synopsys delivers optimised Lynx Design System for Common Platform 32/28nm technology"

MOUNTAIN VIEW, Calif., June 14 /PRNewswire-FirstCall/ — Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design, verification and manufacturing, today introduced its Galaxy Characterization Solution. The Galaxy Characterization Solution is a comprehensive suite of tools architected to generate compact, highly-accurate libraries for the design and implementation of complex system-on-chips (SoCs). Today’s SoCs require libraries that contain hundreds of gigabytes of timing, power, noise and process variation data to ensure the chip meets all performance criteria. The Galaxy Characterization Solution is the only solution that can reduce the library size by an average of 4X and … Read More → "Synopsys Unveils Galaxy Characterization Solution for Standard Cells, Complex Macros and Memories"

MOUNTAIN VIEW, Calif., June 9, 2010— Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it has collaborated with TSMC to validate Synopsys’ custom design solution with TSMC’s 28-nanometer (nm) interoperable process design kit (iPDK) and Analog/Mixed-Signal (AMS) Reference Flow 1.0. TSMC’s 28nm reference phase-locked loop (PLL) design was used to validate Synopsys’ comprehensive custom solution while demonstrating productivity-enhancing capabilities of the TSMC AMS Reference Flow 1.0. The validated solution from Synopsys includes the Galaxy Custom Designer® implementation, HSPICE® circuit … Read More → "Synopsys delivers comprehensive custom design solution for TSMC Analog/Mixed-Signal Reference Flow 1.0"

MOUNTAIN VIEW, Calif., June 09, 2010— Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it is delivering comprehensive design enablement for TSMC’s 28 nanometer (nm) process technology with TSMC Reference Flow 11.0. New features of the flow include solutions for system-level design and verification, added capabilities for 28-nm design, including In-Design physical verification, and support for thru-silicon via (TSV) technology for 3D IC design. Through Reference Flow 11.0, Synopsys tools and IP enable enhanced productivity, lower power, higher yield and increased performance and integration.

“TSMC and … Read More → "Synopsys delivers comprehensive design enablement for TSMC 28-nm process technology with Reference Flow 11.0"

Erfurt, Germany, June 8, 2010. X-FAB Silicon Foundries< … Read More → "X-FAB Announces 8-Inch MEMS Center for Cost-Effective, High-Volume, Advanced MEMS Production"

SAN JOSE, CALIF. –– June 8, 2010 –– EVE, the leader in hardware/software co-verification, … Read More → "During DAC, EVE to Highlight ZeBu’s Infinite Verification Possibilities, STMicroelectronics’ Use of ZeBu"