Verified: the need for continued VHDL support
Banbury, United Kingdom – 9th May 2012 – Aldec Europe is pleased to report the results of Aldec Inc.’s 2012 verification survey. Conducted annually, this year’s survey examined recent trends in Assertions, Coverage, Testbench Management and Hardware-Assisted Verification; with the primary focus on design verification process automation.
More than 2,400 engineers participated, the highest number since Aldec first ran the survey (in 2008). This year, approximately half of the participants are Design Engineers and a third are Test Engineers. The remaining participants include Software Designers, DSP Developers and Board Designers.
The Aldec survey results revealed that, despite … Read More → "Verified: the need for continued VHDL support"

