SAN FRANCISCO (USA), DECEMBER 3, 2018 — At this week’s IEEE IEDM 2018 conference, imec, the world-leading research and innovation hub in nanoelectronics and digital technologies, presents a first demonstration of 3D stacked FinFETs on 300mm wafers using a sequential integration approach with a 45nm fin pitch and 110nm poly pitch technology. The top layer consists of junction-less devices fabricated at a temperature below 525 degrees Celsius in a silicon layer transferred by wafer-to-wafer bonding. The excellent performance of the resulting stack demonstrates how the 3D sequential approach can be deployed to obtain an aggressive device … Read More → "Imec first to stack FinFETS with 45nm fin pitch using sequential 3D integration"

SAN FRANCISCO (USA), DECEMBER 3, 2018 — This week, at the 2018 IEEE International Electron Devices Meeting (IEDM), imec, the world-leading research and innovation hub in nanoelectronics and digital technologies, presents a 300mm-wafer platform for MOSFET devices with 2D materials. 2D materials could provide the path towards extreme device-dimension scaling as they are atomically precise and suffer little from short channel effects. Other possible applications of 2D materials could come from using them as switches in the BEOL, which puts an upper limit on the allowed temperature budget in the integration flow.</ … Read More → "Imec Reports for the First Time Direct Growth of 2D Materials on 300mm Wafers"