industry news
Subscribe Now

Menta Joins GLOBALFOUNDRIES’ FDXcelerator™ Partner Program

Embedded FPGA IP enables built-in programmability in complex SoCs

Montpellier, France – October 23, 2017 – Menta today announced that it has joined GLOBALFOUNDRIES’ FDXcelerator™ Partner Program. As part of the Program, Menta will provide embedded FPGA (eFPGA) IP that enables a new level of built-in hardware programmability in 22FDX® System-on-Chip (SoC) designs targeting automotive applications such as ADAS, vision processors and ISP.

GF’s FDXcelerator Program provides a framework for partners across the supply chain (EDA, ASIC, test, design, IP and packaging) to integrate products or services into validated design solutions, providing a catalog of offerings that can be re-used and adapted to accommodate a range of customer and application-specific requirements.  Leveraging the collaboration under the FDXcelerator program allows customers to design new 22FDX SoCs and move to new advanced FD-SOI process nodes while minimizing development costs and time-to-market.

“Menta and their eFPGA IPs are a complementary addition to GF’s Partner Program,” said Jai Durgam, vice president, Customer Design Enablement at GF. “Their eFPGA IP and associated software provides customers with a solution that enables flexibility in their designs, while at the same time supporting post-production hardware updates that further reduces cost and time to market.”

“Menta is pleased to join the GF’s FDXcelerator Program,” said Vincent Markus, CEO at Menta. “Menta’s eFPGAs are proven on several of GF’s advanced process nodes. Taking this collaboration to the next level, as part of the FDXcelerator program, will now bring the benefits of our eFPGA fabric to a broader range of partners and customers, increasing design flexibility across multiple emerging applications.”

Menta’s eFPGA IP includes customer-defined array sizes for the embedded logic blocks (eLB), embedded application blocks (eAB), and embedded memory blocks (eMB), each of which are customizable in type, number and size to address various markets and applications. The eFPGA IP cores are designed for standard test compatibility with all common test solutions, featuring fault coverage up to 99.8 percent. The eFPGA technology is supplied with Menta’s proven Origami tool chains, including RTL synthesis in VHDL, Verilog or SystemVerilog, as well as support for SDC application design constraints. Menta eFPGA can be fully verified within the customer’s existing design flow.

About Menta

Menta is a privately held company based in Montpellier, France. The company provides embedded FPGA (eFPGA) technology for System on Chip (SoC), ASIC or System in Package (SiP) designs, from EDA tools to IP generation. Menta’s technology is based on scalable, customizable and easily programmable architecture created to provide programmability for next-generation ASIC design with the benefits of FPGA design flexibility. Menta’s technology can support any CMOS process node and foundry. For more information, visit the company website at: www.menta-efpga.com

Leave a Reply

featured blogs
Apr 26, 2024
LEGO ® is the world's most famous toy brand. The experience of playing with these toys has endured over the years because of the innumerable possibilities they allow us: from simple textbook models to wherever our imagination might take us. We have always been driven by ...
Apr 26, 2024
Biological-inspired developments result in LEDs that are 55% brighter, but 55% brighter than what?...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

GaN Solutions Featuring EcoGaN™ and Nano Pulse Control
In this episode of Chalk Talk, Amelia Dalton and Kengo Ohmori from ROHM Semiconductor examine the details and benefits of ROHM Semiconductor’s new lineup of EcoGaN™ Power Stage ICs that can reduce the component count by 99% and the power loss of your next design by 55%. They also investigate ROHM’s Ultra-High-Speed Control IC Technology called Nano Pulse Control that maximizes the performance of GaN devices.
Oct 9, 2023
25,947 views