industry news
Subscribe Now

GUC Delivers its First TSMC N3 Chip and First AI-Optimized N5 Design Using Cadence Digital Solutions

Highlights:
• Using Innovus Implementation, GUC delivered a 3.16GHz HPC core design with 3.5M instances on the TSMC N3 process technology
• GUC realized a 9% area shrink and an 8% reduction in power consumption on a CPU design on the TSMC N5 process using the AI-enabled Cadence Cerebrus

SAN JOSE, Calif., January 19, 2023 —Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Global Unichip Corp. (GUC) successfully delivered an advanced HPC design and a CPU design using Cadence® digital solutions. The HPC design was created using the Cadence Innovus™ Implementation System on TSMC’s advanced N3 process and featured a 3.5 million instance count that reached clock speeds of up to 3.16GHz. The CPU design was created using the AI-enabled Cadence Cerebrus™ Intelligent Chip Explorer and the digital full flow on the TSMC N5 process technology, delivering 8% reduced power and a 9% area improvement while significantly improving engineering productivity.

The Innovus Implementation System’s highly accurate GigaPlace engine provided GUC with support for TSMC FINFLEX™ cell row placement and consideration for pin access throughout the flow for N3 design rule checking (DRC) closure. The state-of-the-art GigaOpt engine delivered improved optimization by enabling the most optimal configuration from the TSMC N3 library while balancing different cell row utilization. The Innovus Implementation System also includes a massively parallel architecture and incorporates the well-established NanoRoute engine, which enabled GUC to address signal integrity early in the design flow while improving post-route correlation.

Cadence Cerebrus, coupled with the Cadence digital flow, was instrumental in providing GUC with power, performance and area (PPA) benefits as well as the ability to perform synthesis through implementation and signoff on their 5nm CPU design, optimizing engineering team productivity. Unique to Cadence Cerebrus is its reinforcement learning engine that autonomously optimized GUC’s design flow, allowing the team to exceed human engineering potential and accelerate time to market.

“GUC is a market leader providing advanced chip solutions for AI, HPC, 5G, industrial and other emerging applications,” said Dr. Louis Lin, senior vice president of Design Services at GUC. “Given our commitment to deliver the most competitive designs to our customers, it is important for us to invest in leading-edge technologies. The Cadence Cerebrus Intelligent Chip Explorer, in conjunction with the broader digital flow, was the natural choice to help us achieve faster design turnaround via AI technology while also improving PPA. The Innovus Implementation System was instrumental in helping us deliver our first N3 chip, enabling our team to accelerate the creation of our high-performance, low-power HPC design.”

Cadence Cerebrus and Innovus Implementation are part of the broader digital flow and support the company’s Intelligent System Design™ strategy, which enables SoC design excellence. For more information, please visit www.cadence.com/go/innovuscerebruscspr.

About Cadence
Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For eight years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

Leave a Reply

featured blogs
Dec 6, 2023
Optimizing a silicon chip at the system level is crucial in achieving peak performance, efficiency, and system reliability. As Moore's Law faces diminishing returns, simply transitioning to the latest process node no longer guarantees substantial power, performance, or c...
Dec 6, 2023
Explore standards development and functional safety requirements with Jyotika Athavale, IEEE senior member and Senior Director of Silicon Lifecycle Management.The post Q&A With Jyotika Athavale, IEEE Champion, on Advancing Standards Development Worldwide appeared first ...
Nov 6, 2023
Suffice it to say that everyone and everything in these images was shot in-camera underwater, and that the results truly are haunting....

featured video

Dramatically Improve PPA and Productivity with Generative AI

Sponsored by Cadence Design Systems

Discover how you can quickly optimize flows for many blocks concurrently and use that knowledge for your next design. The Cadence Cerebrus Intelligent Chip Explorer is a revolutionary, AI-driven, automated approach to chip design flow optimization. Block engineers specify the design goals, and generative AI features within Cadence Cerebrus Explorer will intelligently optimize the design to meet the power, performance, and area (PPA) goals in a completely automated way.

Click here for more information

featured paper

3D-IC Design Challenges and Requirements

Sponsored by Cadence Design Systems

While there is great interest in 3D-IC technology, it is still in its early phases. Standard definitions are lacking, the supply chain ecosystem is in flux, and design, analysis, verification, and test challenges need to be resolved. Read this paper to learn about design challenges, ecosystem requirements, and needed solutions. While various types of multi-die packages have been available for many years, this paper focuses on 3D integration and packaging of multiple stacked dies.

Click to read more

featured chalk talk

Advantech Industrial AI Camera: Small but Mighty
Sponsored by Mouser Electronics and Advantech
Artificial intelligence equipped camera systems can be a great addition to a variety of industrial designs. In this episode of Chalk Talk, Amelia Dalton and Ryan Chan from Advantech explore the components included in an industrial AI camera system, the benefits of Advantech’s AI ICAM-500 Industrial camera series and how you can get started using these solutions in your next industrial design. 
Aug 23, 2023
12,563 views