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GOWIN Semiconductor Announces their ISP (Image Signal Processor) IP Core and Solution

SAN JOSE, Calif. and GUANGZHOU, China, July 20, 2021 (GLOBE NEWSWIRE) — GOWIN Semiconductor Corp., the world’s fastest-growing programmable logic company, introduces their ISP (Image Signal Processor) IP portfolio and reference design for GOWIN FPGAs. The GOWIN ISP IP core portfolio takes the pixel data from an image sensor and adjusts it through CFA (Color Filter Array/Debayer), CCM (Color Correction Array), Gamma correction, and AE (Auto Exposure) and AWB (Auto White Balance) to provide a clear image balanced in color and brightness.

The GOWIN ISP IP core portfolio is designed to offer camera and device manufacturers the ability to produce affordable camera products with a balanced high-quality picture. Imaging projects often use FPGAs to process imaging data at the streaming data rate as an alternative to fixed-function ISP cores in SoCs (System on Chip). As a result, GOWIN’s ISP IP core portfolio can be combined with video interface, scalar, and memory controller IP’s to create a complete programmable SoC solution tailored specifically to the needs of the application and product.

GOWIN provides the ISP IP cores individually in the GOWIN IP core generator. It also provides pre-generated IP cores integrated as part of a larger reference design to complete the image processing pipeline. The reference design also includes an ARM Cortex-M processor to control the image processing pipeline in real-time.

“GOWIN ISP can be configured and programmed through the embedded soft processor. It allows users to easily customize functions and tune ISP performance for their specific application scenarios to achieve better visual quality or higher recognition accuracy. I believe it can greatly shorten development and tuning time,” said Thomas Cheng, Director of Solution Development for GOWIN Semiconductor.

The new GOWIN ISP supports 8bit/10bit image data and provides an adjustable register map for different image sensors and resolutions. Calibration coefficients can be loaded by the MCU or initialized by the bitstream. IP modules in the pipeline can be intercepted allowing users to add their custom imaging blocks as needed.

GOWIN Semiconductor has been paving the way for innovative new FPGA products for several years now and the release of their ISP IP core portfolio and reference design is the latest edition to this success. The GOWIN ISP reference design outputs RGB stream with improved image quality for display or recognition purposes which is required for many imaging products.

“This latest release of an ISP solution from GOWIN continues to push the boundaries of affordable low-powered solutions,” said Mike Furnival, Vice President of International Sales. “We are proud that GOWIN is committed to providing some of the most innovative and creative solutions while continuing to support some of the lowest costs and best availabilities in the industry.”

About GOWIN Semiconductor Corp.
Founded in 2014, GOWIN Semiconductor Corp., headquartered with major R&D in China, has the vision to accelerate customer innovation worldwide with our programmable solutions. We focus on optimizing our products and removing barriers for customers using programmable logic devices. Our commitment to technology and quality enables customers to reduce the total cost of ownership from using FPGA on their production boards. Our offerings include a broad portfolio of programmable logic devices, design software, intellectual property (IP) cores, reference designs, and development kits. We strive to serve customers in the consumer, industrial, communication, medical, and automotive markets worldwide.

For more information about GOWIN, please visit

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