industry news
Subscribe Now

Flex Logix Pairs its InferX X1 AI Inference Accelerator with the High-Bandwidth Winbond 4Gb LPDDR4X Chip to Set a New Benchmark in Edge AI Performance

Winbond’s 4Gb LPDDR4X chip in 200B BGA package offers maximum 4267Mbps data rate at a clock rate up to 2133MHz

TAICHUNG, Taiwan and Mountain View, CA– January 26, 2021 – Winbond Electronics Corporation, a leading global supplier of semiconductor memory solutions, today revealed that its low-power, high-performance LPDDR4X DRAM technology is supporting the latest breakthrough in edge computing from Flex LogixÒ for demanding Artificial Intelligence (AI) applications such as object recognition.

The Winbond LPDDR4X chip is being paired with Flex Logix’s InferX™ X1 edge inference accelerator chip, which is based on an innovative architecture that features arrays of reconfigurable Tensor Processors. This provides higher throughput and lower latency at lower cost than existing AI edge computing solutions when processing complex neural networking algorithms such as YOLOv3 or Full Accuracy Winograd.

“We chose the Flex Logix InferX X1 edge accelerator because it delivered the highest throughput per dollar, which is critical to drive volume mainstream applications,” said Robert Chang, Technology Executive of DRAM Product Marketing Center at Winbond.  “The price/performance advantage of using InferX with our LPDDR4X chip has the potential to significantly expand AI applications by finally bringing inference capabilities to the mass market.”

To support the InferX X1’s ultra-high speed operation while keeping power consumption to a minimum, and Max 7.5TOPS, Flex Logix has paired the accelerator with the W66CQ2NQUAHJ from Winbond, a 4Gb LPDDR4X DRAM which offers a maximum data rate of 4267Mbps at a maximum clock rate of 2133MHz. To enable use in battery-powered systems and other power-constrained applications, the W66 series device operates in active mode from 1.8V/1.1V power rails, and from a 0.6V supply in quiescent mode. It offers power-saving features including partial array self-refresh.

The Winbond LPDDR4X chip operates alongside the InferX X1 processor in Flex Logix’s half-height/half-length PCIe embedded processor board for edge servers and gateways. The system takes advantage of Flex Logix’s architectural innovations, such as reconfigurable optimized data paths which reduce the traffic between the processor and DRAM, to increase throughput and reduce latency.

Dana McCarty, VP of Sales & Marketing for Flex Logix’s AI Inference Products said: “The combination of the unique InferX X1 processor and Winbond’s high-bandwidth LPDDR4X chip sets a new benchmark in edge AI performance. Now for the first time, affordable edge computing systems can implement complex neural networking algorithms to achieve high accuracy in object detection and image recognition even when processing data-intensive high-definition video streams.”

The 4Gb W66CQ2NQUAHJ is comprised of two 2Gb dies in a two-channel configuration. Each die is organized into eight internal banks which support concurrent operation. The chip is housed in a 200-ball WFBGA package which measures 10mm x 14.5mm.

For more information about 1Gb SDP (CS in H1’22), 2Gb SDP, 4Gb LPDDR4/LPDDR4X products, go to www.winbond.com.

For more information about the InferX X1 edge inference accelerator, go to flex-logix.com/inference.

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Miniaturization Impact on Automotive Products
Sponsored by Mouser Electronics and Molex
In this episode of Chalk Talk, Amelia Dalton and Kirk Ulery from Molex explore the role that miniaturization plays in automotive design innovation. They examine the transformational trends that are leading to smaller and smaller components in automotive designs and how the right connector can make all the difference in your next automotive design.
Sep 25, 2023
26,308 views