industry news
Subscribe Now

DVCon Europe 2022 Announces Format and Dates

Calls For Papers, Tutorials and Panels Issued

Munich, Germany – 27thApril, 2022 – The ninth Design and Verification Conference & Exhibition Europe (DVCon Europe), sponsored by Accellera Systems Initiative, will be held as a live event in Munich on 6th and 7th December, with SystemC Evolution Day on 8th.  The calls for papers, tutorials and panels have been issued, with a deadline for initial submissions of 23rd May.

DVCon Europe 2022 will have a particular focus on system-level and verification solutions and the continuing need for co-operation between software and hardware engineering.  This feeds into the on-going aim of the event; to build bridges between different communities and disciplines with cross-functional collaboration and knowledge exchange.

Sumit Jha, General Chair of the steering committee, said, “Our 2020 and 2021 virtual conferences were very well received by the community, with attendees from 90 organisations and 28 countries, and we are really looking forward to meeting in person once again”.

The DVCon Europe 2022 Steering Committee is composed of technical experts from NXP, Intel, Bosch Sensortec, ARM, Infineon, Ericsson and Qualcomm, ensuring that DVCon Europe is made by users for users.

Those submitting papers, tutorials and panels are encouraged to highlight industry themes and trends such as machine learning and AI, functional safety and security, digital twin, RISC-V, next generation automotive and 5G.


The Design and Verification Conference & Exhibition in Europe (DVCon Europe) is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. Sponsored by Accellera Systems Initiative, and one of several DVCon events around the globe (see below), DVCon Europe brings chip architects, design & verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design. For more details, visit Follow #dvconeurope on Twitter.

Forthcoming worldwide DVCon events are:

DVCon China – May 25th, 2022

DVCon Japan – June 23rd, 2022

DVCon India – September 6th-7th, 2022

DVCon U.S. – February 27th – March 2nd, 2023


Accellera Systems Initiative (Accellera) is an independent, not-for profit organization, dedicated to create, support, promote and advance system-level design, modeling and verification standards for use by the worldwide electronics industry. The organization accelerates standards development and, as part of its ongoing partnership with the IEEE, its standards are contributed to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit For membership information, please email Follow @accellera on Twitter or to comment, please use #accellera.

ACCELLERA GLOBAL SPONSORS: Cadence, Siemens EDA, and Synopsys.

Leave a Reply

featured blogs
Jul 1, 2022
We all look for 100% perfection and want to turn our dreams (expectations) into reality as far as we can. Are you also looking for a magic wand to turn expectation into reality? The story applies to... ...
Jun 30, 2022
Learn how AI-powered cameras and neural network image processing enable everything from smartphone portraits to machine vision and automotive safety features. The post How AI Helps Cameras See More Clearly appeared first on From Silicon To Software....
Jun 28, 2022
Watching this video caused me to wander off into the weeds looking at a weird and wonderful collection of wheeled implementations....

featured video

Demo: Achronix Speedster7t 2D NoC vs. Traditional FPGA Routing

Sponsored by Achronix

This demonstration compares an FPGA design utilizing Achronix Speedster7t 2D Network on Chip (NoC) for routing signals with the FPGA device, versus using traditional FPGA routing. The 2D NoC provides a 40% reduction in logic resources required with 40% less compile time needed versus using traditional FPGA routing. Speedster7t FPGAs are optimized for high-bandwidth workloads and eliminate the performance bottlenecks associated with traditional FPGAs.

Subscribe to Achronix's YouTube channel for the latest videos on how to accelerate your data using FPGAs and eFPGA IP

featured paper

Addressing high-voltage design challenges with reliable and affordable isolation tech

Sponsored by Texas Instruments

Check out TI’s new white paper for an overview of galvanic isolation techniques, as well as how to improve isolated designs in electric vehicles, grid infrastructure, factory automation and motor drives.

Click to read more

featured chalk talk

Energy Storage: The Key to Sector Coupling

Sponsored by Mouser Electronics and Phoenix Contact

Climate change is making better energy storage more important than ever before. In this episode of Chalk Talk, Dr. Rüdiger Meyer from Phoenix Contact joins me to discuss the what, where and how of energy storage systems. We take a closer look at the structure and components included in typical energy storage systems and the role that connectors play in successful energy storage systems.

Click here for more information about Phoenix Contact Energy Storage Solutions