industry news
Subscribe Now

ASSET ScanWorks support for Microsemi FPGAs and SoCs slashes flash programming times

  • Dramatically decrease programming times in production and development settings
  • Programming speeds can approach 100x faster

Richardson, TX (Oct. 29, 2019) – Newly released support for Microsemi FPGAs and SoCs on ASSET® InterTech’s ScanWorks® can dramatically decrease programming times for SPI flash memory devices to the point where inline programming on the assembly line will not disrupt the manufacturing beat rate. ASSET InterTech is a leading supplier of JTAG-based software and hardware debug, validation and test tools. ScanWorks, one of the company’s flagship product lines, is a fast test and programming platform.

The Microsemi product families now supported by ScanWorks’ FPGA-based Fast Flash Programming (FFP) tool include IGLOO2 and PolarFire FPGAs and the SmartFusion2 FPGA/SoCs.

“With our ScanWorks FFP tool, SPI programming speeds are limited only by the speed of the FPGA. Other techniques might be limited by the speed of the JTAG interface or the fastest device on the JTAG chain,” said Larry Osborn, product manager for ScanWorks. “We compared our FFP tool with using the JTAG chain to load a 100-megabyte file into flash and FFP was 91-times faster.”

Significantly faster flash programming times can eliminate some of the bottlenecks in system manufacturing and development environments. By programming flash devices on the assembly line, hard-to-manage inventories of pre-programmed flash memories can be eliminated and last-minute changes can be made to the programming data. Development engineers can load a new software image in a matter of seconds instead of sometimes waiting an hour or more.

Pricing and Availability

The FPGA-based FFP tool for ScanWorks is available now from ASSET InterTech and its distributors. Pricing for one-year subscriptions start at $8,485 for a manufacturing license and $15,000 for a development license. For product information, call 888-694-6250, fax 972-437-2826, e-mail ai-info@asset-intertech.com

About ASSET InterTech

ASSET InterTech (www.asset-intertech.com) is a leading supplier of JTAG-based tools to debug, validate and test software and hardware. The company’s best-in-class SourcePoint™ and ScanWorks® platforms work in tandem to give engineers real insight from code to silicon. SourcePoint is a powerful debugger with advanced trace tools for embedded software systems, such as those based on Intel and AMD x86 processors. The boundary-scan based ScanWorks adds control of instruments embedded in chips for at-speed test and design validation of circuit boards. The result is maximum test coverage of the circuit board. Together they empower engineers with tools and technology for the entire life-cycle of a system, beginning with software and hardware development, continuing through design validation and software/hardware integration, and eventually supporting the testing of the product in manufacturing and field service. ASSET InterTech is located at 2201 North Central Expressway, Suite 105, Richardson, TX 75080.

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

E-Mobility - Charging Stations & Wallboxes AC or DC Charging?
In this episode of Chalk Talk, Amelia Dalton and Andreas Nadler from Würth Elektronik investigate e-mobility charging stations and wallboxes. We take a closer look at the benefits, components, and functions of AC and DC wallboxes and charging stations. They also examine the role that DC link capacitors play in power conversion and how Würth Elektronik can help you create your next AC and DC wallbox or charging station design.
Jul 12, 2023
32,877 views