industry news
Subscribe Now

ANSI and VITA Ratify ANSI/VITA 46.0-2019 VPX Baseline Standard

Popular standard for critical and intelligent embedded computing systems updated to meet current market requirements

VITA, October 2, 2019 — VITA, the trade association for standard computing architectures serving critical and intelligent embedded computing systems markets, announces the ratification by ANSI and VITA of the ANSI/VITA 46.0-2019 VPX Baseline Standard for critical embedded computing. This standard has completed the VITA and ANSI processes reaching full recognition under guidance of VITA.

The VITA/ANSI process requires that every active standard be reviewed every five years. The VITA 46 VPX working group started work in March 2003, ratifying a baseline VPX standard in 2007, and revised in 2013. This 2019 revision makes several deletions, clarifications and updates to the capabilities defined in the standard to be in line with current requirements of VPX technology.

“VPX has gained widespread acceptance as a key high-performance embedded computing platform in many defense applications”, stated Jerry Gipper, VITA Executive Director. “Much of the hardware work being done by the SOSA™ Consortium is based on the VPX family of standards.” (https://www.opengroup.org/sosa-consortium-applauds-recent-tri-services-directive-use-modular-open-systems)

The VPX base standard defines physical features that enable high-speed communication in a 3U or 6U backplane-based critical and intelligent embedded computing systems.

The VPX family of standards includes:

  • ANSI/VITA 46.0 Baseline Standard
  • ANSI/VITA 46.1: VMEbus Signal Mapping
  • ANSI/VITA 46.3 Serial RapidIO
  • ANSI/VITA 46.4 PCI Express
  • ANSI/VITA 46.6 Gigabit Ethernet Control Plane on VPX
  • ANSI/VITA 46.7 Ethernet
  • ANSI/VITA 46.9 PMC/XMC rear I/O
  • ANSI/VITA 46.10 Rear Transition Module
  • ANSI/VITA 46.11 System Management on VPX

The ANSI/VITA 65.x architecture framework standards define system-level VPX interoperability for multi-vendor, multi-module, integrated system environments. Several other related standards add capability to VPX. Additional work is underway to improve the data rate of VPX to 25 Gbaud.

Copies of the standard are available for purchase at the VITA Online Store (www.vita.com/Purchase).

About VITA

Founded in 1984, VITA is an incorporated, non-profit organization of suppliers and users who share a common market interest in critical embedded systems. VITA champions open system architectures. Its activities are international in scope, technical, promotional, and user-centric. VITA aims to increase total market size for its members, expand market exposure for suppliers, and deliver timely technical information. VITA has American National Standards Institute (ANSI) and International Electrotechnical Commission (IEC) accreditation to develop standards (VME, VXS, VPX, OpenVPX, VPX REDI, XMC, FMC, FMC+, VNX, Reliability Community, etc.) for embedded systems used in a myriad of critical applications and harsh environments. For more information, visit www.VITA.com.

Leave a Reply

featured blogs
Apr 26, 2024
Biological-inspired developments result in LEDs that are 55% brighter, but 55% brighter than what?...

featured video

Introducing Altera® Agilex 5 FPGAs and SoCs

Sponsored by Intel

Learn about the Altera Agilex 5 FPGA Family for tomorrow’s edge intelligent applications.

To learn more about Agilex 5 visit: Agilex™ 5 FPGA and SoC FPGA Product Overview

featured paper

Altera® FPGAs and SoCs with FPGA AI Suite and OpenVINO™ Toolkit Drive Embedded/Edge AI/Machine Learning Applications

Sponsored by Intel

Describes the emerging use cases of FPGA-based AI inference in edge and custom AI applications, and software and hardware solutions for edge FPGA AI.

Click here to read more

featured chalk talk

SLM Silicon.da Introduction
Sponsored by Synopsys
In this episode of Chalk Talk, Amelia Dalton and Guy Cortez from Synopsys investigate how Synopsys’ Silicon.da platform can increase engineering productivity and silicon efficiency while providing the tool scalability needed for today’s semiconductor designs. They also walk through the steps involved in a SLM workflow and examine how this open and extensible platform can help you avoid pitfalls in each step of your next IC design.
Dec 6, 2023
19,449 views