Sunnyvale, CA – April 28, 2014 – Semi-Pac today announced that they have developed a high reliability assembly capability for semiconductor process and device qualification. This assembly technique was developed to not introduce additional failure mechanisms into the device under test and can withstand the rigors of 350°C life testing.
Semi-Pac has earned the reputation of developing creative solutions for difficult semiconductor packaging and assembly challenges. A number of years ago, one of the major semiconductor foundries approached Semi-Pac to help them come up with a solution for assembly induced qualification failures that were severely impacting the qualification testing results.
Some of the problems were caused by the materials and temperatures involved in the conventional die attach and bonding process. Often high temperature accelerated life testing caused the bonds to detach from the integrated circuit. Sometimes these assembly induced failures were severe enough to cause the entire qualification to fail and requiring a new run of wafers to be qualified until the process could be released.
Running a new run of wafers was an unnecessary expense but even worse, idled a multi-billion dollar fab until the process could be qualified. Semi-Pac developed a special assembly process to solve this problem. This process has been perfected over the last 10 years to the point that it is highly repeatable and is only available from Semi-Pac.
PurePac’s key features are:
- High Purity Assembly Materials ensures low outgassing and no packaging material influence of the test results.
- Proprietary Low Temperature Assembly Process
- Unique Die attach Material – no die delamination during testing.
- Unique Package Plating Metal System – high reliability wire bonding.
- Unique Wire Bonding Materials and Bonding Machine Setup – best in class performance.
- Unique Lid System – avoids solder re-deposition on semiconductor device during test.
John MacKay, Semi-Pac’s President and CEO said: “Semiconductor devices are very sensitive to impurities and particles. Therefore, to manufacture these devices it is necessary to manage many processes while accurately controlling the level of impurities and particles. The finished product quality depends upon the many layered relationships of each interacting substance in the semiconductor, including metallization, chip material, semiconductor assembly materials and package.
Developing the right packaging material and processes to withstand the accelerated life test environment is a significant packaging and assembly challenge. We have developed a unique and proven solution with PurePac. We would like to demonstrate this capability to other semiconductor manufacturers.”
About Semi-Pac
Semi-Pac is a global semiconductor packaging engineering, quick turn prototype and volume production company headquartered in Sunnyvale, California with production facilities in Silicon Valley and Singapore. Tom Molinaro and John Mackay founded Semi-Pac in 1988 to address the demand for package engineering and research and development. Both Tom and John have extensive packaging experience, having been in the industry since the 1970’s.
Semi-Pac specializes in quick turn high yield semiconductor assembly applications for prototype through production. Semi-Pac thrives on developing innovative solutions to the most difficult packaging challenges including MCM, wafer bumping, stacked die and wafer level packaging. Semi-Pac has an excellent quality record in supplying services to commercial, medical and military chip manufacturers. Semi-Pac’s customers include many top tier semiconductor manufacturers.
