industry news
Subscribe Now

Cadence Redefines Verification Planning and Management with Incisive vManager Solution

SAN JOSE, Calif., 24 Feb 2014

HIGHLIGHTS:

  • All-new verification planning and management solution delivers multi-user, multi-engine, multi-project and multi-analysis capabilities
  • MDV methodology improves verification productivity by 2X or more
  • Integrated commercial SQL database technology enables broad scalability
  • Seamless interoperability with Incisive verification platform and Palladium XP Verification Computing Platform

Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today introduced an all-new Incisive® vManager™ solution, a verification planning and management solution enabled by client/server technology to address the growing verification closure challenge driven by increasing design size and complexity. The Incisive vManager solution, with its metric-driven verification (MDV) methodology, improves verification productivity by 2X or greater over traditional methods by combining executable verification plans, coverage optimization techniques, collaborative management utilities, deep failure and coverage analysis, and clear visibility to see when to shift resources. 

Part of the Cadence® Incisive functional verification platform, the Incisive vManager solution utilizes commercial SQL database technology and enables broad scalability from small intellectual property (IP) projects to gigascale system-on-chip (SoC) designs. Additionally, to ensure SoC developers have a consistent methodology for design quality enhancements, the Incisive vManager solution supports several MDV extensions addressing applications including acceleration, low power and mixed-signal verification. 

Incisive vManager Key Features

  • Multi-user support: Allows unlimited simultaneous users for improved collaboration and better visibility into team-based verification

  • Multi-engine support: Operates seamlessly with Incisive Enterprise Simulator, Incisive Formal Verifier and Palladium® XP Verification Computing Platform

  • Multi-project capability: Enables multiple projects to be managed independently within the same environment—an industry first. Users can view project status, progress over time, and key metrics enabling verification signoff
     
  • Multi-analysis feature: With the fully integrated Incisive Metrics Center, users can analyze coverage, test failures, perform failure triage, create and analyze executable plans, find coverage holes and design problems, all to determine focus areas to complete verification

“The move to gigascale SoC designs with larger and more dispersed design teams and increased time-to-market pressures has created new verification management challenges for companies,” said Andy Eliopoulos, vice president, research and development, Advanced Verification Solutions at Cadence. “With the Incisive vManager solution, Cadence is solving these challenges and launching a new era of verification management. For the first time, design teams will have the ability to support multiple users, better coordinate and control the verification process, and dramatically improve their productivity.” 

For more detailed information on the Incisive vManager solution, visit www.cadence.com/news/vmanager

Incisive vManager Customers Speak Out

“The Incisive vManager solution has been very well accepted by our design and verification teams because it’s really straightforward, intuitive and easy to use. The Incisive vManager solution helps us with project visibility, which improves our verification productivity,” said Mirella Negro Marcigaglia, verification manager, STMicroelectronics. 

“Driven by ever-more-demanding use cases, the growing complexity of our DSPs require a highly powerful verification tool capable of addressing billions of coverage points. The new Incisive vManager solution allows us to merge and analyze our latest cores’ databases on a scale never before possible, improving our productivity and providing faster time-to-market. As we begin to take advantage of the multi-user capability, we are confident we will gain even further improvements,” said Ran Snir, VLSI director at CEVA.

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

Leave a Reply

featured blogs
Nov 24, 2020
The ICADVM20.1 and IC6.1.8 ISR15 production releases are now available for download at Cadence Downloads . For information on supported platforms and other release compatibility information, see the... [[ Click on the title to access the full blog on the Cadence Community si...
Nov 23, 2020
It'€™s been a long time since I performed Karnaugh map minimizations by hand. As a result, on my first pass, I missed a couple of obvious optimizations....
Nov 23, 2020
Readers of the Samtec blog know we are always talking about next-gen speed. Current channels rates are running at 56 Gbps PAM4. However, system designers are starting to look at 112 Gbps PAM4 data rates. Intuition would say that bleeding edge data rates like 112 Gbps PAM4 onl...
Nov 20, 2020
[From the last episode: We looked at neuromorphic machine learning, which is intended to act more like the brain does.] Our last topic to cover on learning (ML) is about training. We talked about supervised learning, which means we'€™re training a model based on a bunch of ...

Featured video

Synopsys and Intel Full System PCIe 5.0 Interoperability Success

Sponsored by Synopsys

This video demonstrates industry's first successful system-level PCI Express (PCIe) 5.0 interoperability between the Synopsys DesignWare Controller and PHY IP for PCIe 5.0 and Intel Xeon Scalable processor (codename Sapphire Rapids). The ecosystem can use the companies' proven solutions to accelerate development of their PCIe 5.0-based products in high-performance computing and AI applications.

More information about DesignWare IP Solutions for PCI Express

featured paper

Streamlining functional safety certification in automotive and industrial

Sponsored by Texas Instruments

Functional safety design takes rigor, documentation and time to get it right. Whether you’re designing for the factory floor or cars on the highway, this white paper explains how TI is making it easier for you to find and use its integrated circuits (ICs) in your functional safety designs.

Click here to download the whitepaper

Featured Chalk Talk

RX23W Bluetooth

Sponsored by Mouser Electronics and Renesas

Adding Bluetooth to your embedded design can be tricky for IoT developers. Bluetooth 5 brings a host of new capabilities that make Bluetooth integration more compelling than ever. In this episode of Chalk Talk, Amelia Dalton chats with Michael Sarpa from Renesas about the cool capabilities of Bluetooth 5, and how you can easily integrate them into your next project.

More information about Renesas Electronics RX23W 32-bit Microcontrollers