SUNNYVALE, Calif., Feb. 17, 2014 /PRNewswire/ — Spansion Inc. (NYSE: CODE), a global leader in embedded systems solutions, today announcedSpansion® HyperBus™ Interface, a breakthrough that dramatically improves read performance while reducing the number of pins. The SpansionHyperBus Interface is being implemented broadly by leading system-on-chip (SoC) manufacturers.
Spansion is also introducing today the first family of products based on this new interface, Spansion HyperFlash™ NOR Memory devices, with read throughput of up to 333 megabytes per second—more than five times faster than ordinary Quad SPI flash currently available with one-third the number of pins of parallel NOR flash.
Spansion HyperBus Interface Enables Fast, Efficient Applications
Embedded design engineers need high-speed solutions to address the instant-on and interactive graphical user interface (GUI) requirements of next-generation electronics. The Spansion HyperBus Interface will enable a wide range of high-performance applications, such as automotive instrument clusters, infotainment / navigation systems, advanced driver assistance systems (ADAS), hand-held displays, digital cameras, projectors, factory automation, medical diagnostic equipment, and home automation appliances.
The efficient 12-pin Spansion HyperBus Interface consists of an 8-pin address/data bus, a differential clock (2 signals), one Chip Select and a Read Data Strobe for the controller, reducing the overall cost of the system.
Industry Quotes
“The Spansion HyperBus interface is a powerful advancement on today’s low pin count memory interfaces. The extra functionality and performance is specifically welcome in automotive applications where it allows high-speed, off chip access through a simple low pin count connection. We are pleased to have worked with Spansion during the development of the new HyperBus standard and you’ll see a number of Freescale Microcontrollers appearing in the near future taking advantage of this new interface.”
Ray Cornyn, Vice President of Product Management for Freescale’s Automotive Microcontrollers business.
“This new interface from Spansion is a game-changer for memory technologies and peripherals alike. The combination of low latency, high read throughput, and low pin-count will appeal to designers looking to differentiate their products in a competitive market place. This interface has the potential to deliver performance and space efficiency to a variety of hardware solutions, including: flash, RAM and peripheral devices. In addition, theSpansion HyperBus Interface provides a clear transition for ‘SPI NOR-type’ devices to migrate to higher density and higher speed previously only available through a parallel high pin-count NOR device.”
Alan Niebel, CEO, Web-Feet Research
“For several years now, SPI flash has been a popular low-pin-count solution for reducing system costs and board space. Spansion’s HyperBusInterface gives embedded designers a new level of performance and pin-count efficiency. The Spansion HyperBus Interface allows for much faster boot time, direct execute-in-place from flash and less code shadowing, reducing the amount of RAM needed.”
Robin Jigour, Senior Vice President of the Flash Memory Business Group, Spansion.
About Spansion HyperFlash Memory
Spansion HyperFlash Memory family will offer 3V and 1.8V power-supply versions and initially include three densities: 128Mb, 256Mb and 512Mb, with the 512Mb devices sampling in the second quarter of 2014. HyperFlash memories will be available in a space-saving 8x6mm ball grid array (BGA) package. Spansion HyperFlash Memory devices provide a migration path—from single Quad SPI to Dual Quad SPI to HyperFlash Memory—allowing system applications to be scaled to different levels of flash performance when paired with compatible controllers, giving OEMs the ability to offer different product models with a single design.
