industry news
Subscribe Now

Cadence Physical Verification System Qualified for TSMC 28nm, 20nm Process

SAN FRANCISCO, CA–(Marketwire – June 04, 2012) – DAC Booth # 1930 — Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that TSMC has qualified the Cadence® Physical Verification System (PVS) for 28-nanometer design signoff, and completed Phase I certification for TSMC’s 20-nanometer process.

Designers can request a PVS 20-nanometer technology file directly from TSMC for early design exploration, and access TSMC-Online to download 28-nanometer technology files for signoff.

Cadence PVS supports 20-nanometer technology where innovative patterning technology is used. The dedicated PVS engine improves color loop detection accuracy, reduces false errors and provides intuitive error reporting. The Cadence technology also ensures mask decomposition feasibility.

Cadence PVS is integrated with Cadence Virtuoso® custom and Encounter® digital implementation platforms to help designers find and fix errors early in the implementation stage. Integration with Virtuoso includes real-time, in-design design rule checking (DRC) verification; real-time 20-nanometer DPT color loop detection; and incremental DRC correction and verification.

“Our work with TSMC helps ensure that design teams will have advanced implementation and signoff technologies available for SoC design and manufacturing,” said Chi-Ping Hsu, senior vice president of research & development, Silicon Realization Group. “TSMC’s qualification of Cadence PVS at 28 nanometers and early certification for 20 nanometers represents an important joint commitment to deliver convergent verification capabilities for today’s complex mixed-signal SoCs.”

“PVS has successfully completed TSMC’s qualification process for 28-nanometer design signoff,” said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. “We worked closely with Cadence to achieve these results, including technical collaboration on 20-nanometer advanced technology.”

About Cadence

Cadence enables global electronic design innovation and plays an essential role in the creation of today’s integrated circuits and electronics. Customers use Cadence software, hardware, IP, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.

Leave a Reply

featured blogs
May 6, 2026
Hollywood has struck gold with The Lord of the Rings and Dune'”so which sci-fi and fantasy books should filmmakers tackle next?...

featured paper

Want early design analysis without simulation?

Sponsored by Siemens Digital Industries Software

Traditional verification methods are failing today's complex IC designs, which require a proactive, early-stage analysis approach. A shift-left methodology addresses IP block integration challenges and the limitations of traditional simulation and ERC tools. Insight Analyzer detects hard-to-find leakage issues across power domains, enabling early analysis without full simulation. Identify inefficiencies earlier to reduce rework, improve reliability, and enhance power performance.

Click to read more!

featured chalk talk

Designing Scalable IoT Mesh Networks with Digi XBee® for Wi-SUN
Sponsored by Mouser Electronics and Digi and Silicon Labs
In this episode of Chalk Talk, Quinn Jones from Digi, Chad Steider from Silicon Labs and Amelia Dalton explore how Wi-SUN Micro-Mesh can reduce cost and simplify deployment for your next IoT mesh network. They also investigate the benefits that Digi XBee solutions bring to these types of networks and how you can jump start your next IoT mesh network design with Silicon Labs and Digi.
May 4, 2026
9,663 views