industry news
Subscribe Now

NetLogic Microsystems Unleashes Groundbreaking XLP® II, the World’s Most Powerful Multi-Core Communications Processors with Unparalleled Scalability to 640 NXCPUs™

Santa Clara, Calif. – September 7, 2011 –NetLogic Microsystems, Inc. [NASDAQ: NETL], a worldwide leader in high-performance intelligent semiconductor solutions for next-generation Internet networks, today announced the innovative XLP® II family of multi-core processors, the industry’s most advanced and highest performance communications multi-core processors for next-generation LTE mobile infrastructure, data center, enterprise networking, storage and security applications. 

As an aggressive early adopter of the state-of-the-art 28nm process technology, the XLP II processor family features groundbreaking innovations that deliver a dramatic 5-7x performance enhancement over the existing generation of XLP processors, which already offer best-in-class performance and have set the gold standard in multi-core processing today.  The XLP II processor family is designed to deliver over 100 Gigabits-per-second (Gbps) of network processing performance per device, and over 800Gbps in a clustered, fully-coherent system, which is an order-of-magnitude beyond anything currently available in the market. 

As NetLogic Microsystems’ fourth-generation multi-core processor family, the new XLP II multi-core processors integrate up to 80 high-performance NXCPUs™ per chip, featuring an enhanced quad-issue, quad-threaded, superscalar out-of-order processor architecture capable of operating at up to 2.5 GHz to provide unmatched control and data plane processing and low-power profile.  These processor cores include advancements that considerably improve pre-fetch performance, branch mis-predict penalties and cache access latencies.  The XLP II multi-core processor family also significantly expands the tri-level cache architecture to over 32MB of fully coherent on-chip cache which represents over 260MB of on-chip cache in the maximum clustered configuration of 8 fully-coherent XLP II processors.

Unmatched Scalability to 640 NXCPUs

To further extend the performance and capabilities of the XLP II processors, customers will be able to design systems using eight sockets of XLP II processors to achieve an unprecedented scalability of up to 640 NXCPUs.  A second-generation high-speed Inter-chip Coherency Interface (ICI) enables full processor and memory coherency across all 640 NXCPUs, making it seamless for software applications to run in Symmetric Multi Processing (SMP) or Asymmetric Multi Processing (AMP) modes.  This extraordinary scalability is unmatched in the industry, and enables original equipment manufacturers (OEMs) to develop highly scalable, highly differentiated equipment spanning entry-level multi-Gigabit to high-end Terabit systems. 

“Building upon the performance leadership and strong design win momentum of our industry-leading XLP processor family, we are pleased to announce our revolutionary XLP II processor family featuring numerous innovations that put us a full generation ahead of competing communications multi-core solutions. We believe our highly differentiated XLP II processor is a true game-changer that will give us a significant competitive advantage in the communications infrastructure market,” said Ron Jankov, president and chief executive officer at NetLogic Microsystems.  “The XLP II multi-core processor family is the result of our intensive R&D development in the advanced 28nm process over the past 24 months, and our uniquely close partnership with TSMC.  I congratulate our team for once again out-executing and out-innovating the communications processing industry to further extend our performance leadership and separate ourselves from the competition.”

“NetLogic Microsystems is moving aggressively to 28nm technology ahead of the competition. The XLP II multi-core processor will deliver a sizeable leap in performance compared with today’s popular XLP products,” said Linley Gwennap, principal analyst at The Linley Group and editor-in-chief of the Microprocessor Report.  “In an industry with an insatiable demand for greater performance, the XLP II’s scalability to eight sockets should keep it at the forefront of performance. No competing processor vendor provides scalability to this level of performance.”

For the high-end of the XLP II family, to complement the 80 NXCPUs per chip, the XLP II multi-core processors include fully-autonomous hardware processing engines to accelerate a variety of networking, security and storage functions, such as:

  • CPU Virtualization Engines supporting full-virtualization and para-virtualization modes
  • Network Acceleration Engines for ingress/egress packet parsing and management
  • Packet Ordering Engines
  • Deep Packet Inspection Engines for Layer 7 application processing, intrusion prevention, malware detection and regular expression search acceleration
  • Security Acceleration Engines for encryption, decryption and authentication protocols
  • Compression/Decompression Engines
  • TCP Segmentation Offload Engines
  • RAID-5/RAID-6 Acceleration Engines
  • Storage De-Duplication Acceleration Engines
  • IEEE 1588 Hardware Time Stamping

NetLogic Microsystems’ XLP II multi-core processor family features a third-generation high-speed Fast Messaging Network® that provides higher-bandwidth, lower-latency communications among the 640 NXCPUs, and to support hundreds of billions of in-flight messages and packet descriptors among all the on-chip elements.  In addition to the Fast Messaging Network, the XLP II processors integrate a very advanced on-chip interconnect for the memory sub-system as well as a wide range of high-speed physical-layer and logical-layer networking interfaces.

The XLP II multi-core processor family offers a tri-level cache architecture with over 32MB of fully coherent on-chip cache and integrates four channels of DDR3 memory controllers that yield over 545Gbps of off-chip memory bandwidth.  In the maximum clustered configuration of 8 fully-coherent XLP II chips, this represents over 260MB of on-chip cache and up to 32 DDR3 memory ports yielding 4.4Tbps of DRAM access.

To enable customers to take full advantage of all these performance advancements while meeting tight power budgets, the XLP II processor family also incorporates very sophisticated power management technology and innovations that deliver best-in-class power/performance ratio that in turn helps system vendors develop energy-efficient networking and communications equipment.

The first members of the XLP II processor family will be available in the first quarter of 2012, with additional members expected to sample in the first half of 2012.  NetLogic Microsystems will be disclosing additional technical details of its XLP II multi-core processor family at the upcoming Linley Tech Processor Conference in October and future conferences in 2012. 

For more information about NetLogic Microsystems’ multi-core processors, please contact sales@netlogicmicro.com.   

About NetLogic Microsystems

NetLogic Microsystems, Inc. (NASDAQ: NETL) is a worldwide leader in high-performance intelligent semiconductor solutions that are powering next-generation Internet networks.  NetLogic Microsystems’ best-in-class products perform highly differentiated tasks of accelerating complex network traffic to significantly enhance the performance and functionality of advanced 3G/4G mobile wireless infrastructure, data center, enterprise, metro Ethernet, edge and core infrastructure networks.  NetLogic Microsystems’ market-leading product portfolio includes high-performance multi-core processors, knowledge-based processors, content processors, network search engines, ultra low-power embedded processors and high-speed 10/40/100 Gigabit Ethernet PHY solutions.  These products are designed into high-performance systems such as switches, routers, wireless base stations, security appliances, networked storage appliances, service gateways and connected media devices offered by leading original equipment manufacturers (OEMs).  NetLogic Microsystems is headquartered in Santa Clara, California, and has offices and design centers throughout North America, Asia and Europe.  For more information about products offered by NetLogic Microsystems, call +1-408-454-3000 or visit the NetLogic Microsystems Web site at http://www.netlogicmicro.com.

Leave a Reply

featured blogs
May 2, 2024
I'm envisioning what one of these pieces would look like on the wall of my office. It would look awesome!...
Apr 30, 2024
Analog IC design engineers need breakthrough technologies & chip design tools to solve modern challenges; learn more from our analog design panel at SNUG 2024.The post Why Analog Design Challenges Need Breakthrough Technologies appeared first on Chip Design....

featured video

Why Wiwynn Energy-Optimized Data Center IT Solutions Use Cadence Optimality Explorer

Sponsored by Cadence Design Systems

In the AI era, as the signal-data rate increases, the signal integrity challenges in server designs also increase. Wiwynn provides hyperscale data centers with innovative cloud IT infrastructure, bringing the best total cost of ownership (TCO), energy, and energy-itemized IT solutions from the cloud to the edge.

Learn more about how Wiwynn is developing a new methodology for PCB designs with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver.

featured paper

Achieve Greater Design Flexibility and Reduce Costs with Chiplets

Sponsored by Keysight

Chiplets are a new way to build a system-on-chips (SoCs) to improve yields and reduce costs. It partitions the chip into discrete elements and connects them with a standardized interface, enabling designers to meet performance, efficiency, power, size, and cost challenges in the 5 / 6G, artificial intelligence (AI), and virtual reality (VR) era. This white paper will discuss the shift to chiplet adoption and Keysight EDA's implementation of the communication standard (UCIe) into the Keysight Advanced Design System (ADS).

Dive into the technical details – download now.

featured chalk talk

Power High-Performance Applications with Renesas RA8 Series MCUs
Sponsored by Mouser Electronics and Renesas
In this episode of Chalk Talk, Amelia Dalton and Kavita Char from Renesas explore the first 32-bit MCUs based on the new Arm® Cortex® -M85 core. They investigate how these new MCUs bridge the gap between MCUs and MPUs, the advanced security features included in this new MCU portfolio, and how you can get started using the Renesas high performance RA8 series in your next design. 
Jan 9, 2024
16,712 views