industry news
Subscribe Now

Elliptic Technologies Debuts New Multi-Packet Processing Security Engine For High Capacity Wireless And Network Applications

August 31 – Ottawa, Canada: Elliptic Technologies, a leading global supplier of security IP and software, unveiled today its latest security engine called the Multi-Packet Manager, a highly programmable and efficient security protocol accelerator with enhanced processing capabilities for multiple data streams. The Multi-Packet Manager is perfectly suited for applications that deal with multiple active connections and significant traffic load on different contexts, such as 4G LTE-Advanced wireless cellular base stations and femtocells.

The market is experiencing an explosion of new multi-media enabled mobile devices that are connecting to networks in all market segments, from smartphones, tablets, datacom, to consumer electronics and smart grid. It is estimated that there will be more than 50 billion connected devices in use by 2020. This rapid growth puts a lot of pressure on the wireless and wireline system infrastructure processing power and capabilities, and increases the need for robust security solutions. As an example, 4G LTE-Advanced femtocells and base stations will be required to handle many more simultaneous data and voice channels than what is commonly used today. This will require Embedded Systems and SoCs to process more data with increasingly aggressive performance and latency targets.

Elliptic’s Multi-Packet Manager is specifically designed to address these challenges by significantly reducing the CPU and software loads and by improving the system level latencies via autonomous packet processing and automated key caching mechanisms. The Multi-Packet Manager allows the host processor to dynamically add network packets to be processed while the security engine is busy processing data. Intelligent caching and pre-fetching reduces the bus traffic, internal buffering and power consumption without increasing the software load in a system.

“The ever increasing multimedia data traffic and the growth of mobile devices is posing a significant challenge for embedded systems to process more data faster and to provide the security means for devices and data that are so vital to people and businesses” said Vijay Dube, President and CEO of Elliptic Technologies. “Elliptic’s Multi-Packet Manager solves the challenge of processing multiple streams of data with aggressive system latency constraints and positions Elliptic at the forefront with leading-edge, complete security solutions backed by deep in-house security expertise”.

The Multi-Packet Manger can be preconfigured to match the customer’s system requirements. The engine reduces the CPU interrupt impact by allowing interrupts to be issued at the end of the packet list, after a specific number of packet descriptors have been processed, and on demand.

To meet the needs of multiple security applications such as 3GPP/LTE-Advanced, IPsec, SRTP, MACsec and storage, Elliptic’s Multi-Packet Manager security engine offers support for all required cipher and message authentication algorithms. This allows designers to seamlessly integrate security functions tuned for the specific applications the SoCs are targeted at.

Leave a Reply

featured blogs
Oct 23, 2020
Processing a component onto a PCB used to be fairly straightforward. Through-hole products, or a single or double row surface mount with a larger centerline rarely offer unique challenges obtaining a proper solder joint. However, as electronics continue to get smaller and con...
Oct 23, 2020
[From the last episode: We noted that some inventions, like in-memory compute, aren'€™t intuitive, being driven instead by the math.] We have one more addition to add to our in-memory compute system. Remember that, when we use a regular memory, what goes in is an address '...
Oct 23, 2020
Any suggestions for a 4x4 keypad in which the keys aren'€™t wobbly and you don'€™t have to strike a key dead center for it to make contact?...
Oct 23, 2020
At 11:10am Korean time this morning, Cadence's Elias Fallon delivered one of the keynotes at ISOCC (International System On Chip Conference). It was titled EDA and Machine Learning: The Next Leap... [[ Click on the title to access the full blog on the Cadence Community ...

featured video

Better PPA with Innovus Mixed Placer Technology – Gigaplace XL

Sponsored by Cadence Design Systems

With the increase of on-chip storage elements, it has become extremely time consuming to come up with an optimized floorplan with manual methods. Innovus Implementation’s advanced multi-objective placement technology, GigaPlace XL, provides automation to optimize at scale, concurrent placement of macros, and standard cells for multiple objectives like timing, wirelength, congestion, and power. This technology provides an innovative way to address design productivity along with design quality improvements reducing weeks of manual floorplan time down to a few hours.

Click here for more information about Innovus Implementation System

featured paper

Fundamentals of Precision ADC Noise Analysis

Sponsored by Texas Instruments

Build your knowledge of noise performance with high-resolution delta-sigma ADCs. This e-book covers types of ADC noise, how other components contribute noise to the system, and how these noise sources interact with each other.

Click here to download the whitepaper

Featured Chalk Talk

Evaluation and Development Kits

Sponsored by Samtec

With signal integrity becoming increasingly challenging in today’s designs, interconnect is taking on a key role. In order to see how a particular interconnect solution will perform in our design, we really need hands-on evaluation of the technology. In this episode of Chalk Talk, Amelia Dalton chats with Matthew Burns of Samtec about evaluation and development kits for high-speed interconnect solutions.

More information about Samtec Evaluation and Development Kits