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Synopsys Launches Industry’s First MIPI® DigRF(SM) v4 IP

MOUNTAIN VIEW, Calif., May 3 — Synopsys, Inc. (NASDAQ:SNPS) , a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the immediate availability of the DesignWare® MIPI® 4G DigRF(SM) Master Controller IP. By complementing its current silicon-proven DesignWare MIPI 3G DigRF Controller and PHY IP, Synopsys becomes the first vendor to offer a comprehensive IP portfolio for both the MIPI DigRF v3 and v4 standards. The configurable MIPI 4G DigRF Master Controller is compliant to the recently ratified MIPI DigRF v4 1.00 specification and enables designers to reliably implement the new standard. In addition, Synopsys is developing the DesignWare M-PHY(SM), the physical layer for the MIPI DigRF v4 interface, in parallel with the ratification of the specification. A single-vendor solution enables designers to lower the risk and cost of integrating the DigRF interfaces into baseband ICs (BBICs) and application processors, while speeding time-to-market of advanced LTE and Mobile WiMAX system-on-chips (SoCs). 

“As a leading provider of 4G mobile broadband solutions, having a high-quality DigRF IP solution is critical to our product developments,” said Sunny Padacheril, vice president of Engineering for SoC Development at Beceem. “We selected the DesignWare 4G DigRF solution because of Synopsys’ expertise and track record of delivering high-speed interfaces.”

MIPI Alliance’s DigRF v4 is the latest generation of the standard that defines the interface between RF transceiver ICs (RFIC) and BBICs and addresses the increased data throughput requirements for mobile terminals targeting 4G standard air interfaces such as LTE and mWiMAX. The DigRF v4 specification also supports existing 3GPP standards such as 2.5G and 3.5G. The low power and area-efficient DesignWare 4G DigRF Master Controller implements the features defined for the protocol and PHY adaptation layers of the DigRF v4 rev 1.00 specification. The DesignWare DigRF IP has also verified interoperability with RFIC devices currently available on the market. Configurability of the IP RTL provides flexibility for system-specific implementations, such as number of lanes, sublinks and diversity, while protocol-specific attributes including IQ sample size, frame scheduling and handling of timing critical signals are software programmable.

“Ratification of the DigRF v4 specification is a key achievement for the MIPI Alliance,” said Joel Huloux, chairman of the MIPI Alliance. “As an active contributor to the MIPI working groups, Synopsys has direct influence on the specification which enables them to provide a comprehensive IP solution that will help speed the adoption of this new interface into the mobile market.”

“MIPI standards such as DigRF are instrumental to improving interoperability and accelerating development of mobile devices,” said John Koeter, vice president of marketing for the Solutions Group at Synopsys. “This latest addition to the DesignWare MIPI portfolio, now consisting of DigRF v3 and v4, CSI-2 and D-PHY IP, enables designers to turn to a single, trusted vendor for high-quality solutions that help them bring MIPI-based products to the market faster and with less risk.”

Availability

The DesignWare DigRF 4G controller is available now to early adopters. The M-PHY is under development based on the evolving MIPI specification. For more information, visit: http://www.synopsys.com/mipi.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven interface and analog IP solutions for system-on-chip designs. Synopsys’ broad IP portfolio delivers complete connectivity IP solutions consisting of controllers, PHY and verification IP for widely used protocols such as USB, PCI Express, DDR, SATA, Ethernet, HDMI and MIPI IP including 3G DigRF, CSI-2 and D-PHY. The analog IP family includes Analog-to-Digital Converters, Digital-to-Analog Converters, Audio Codecs, Video Analog Front Ends, Touch Screen Controllers and more. In addition, Synopsys offers SystemC transaction-level models to build virtual platforms for rapid, pre-silicon development of software. With a robust IP development methodology, extensive investment in quality and comprehensive technical support, Synopsys enables designers to accelerate time-to-market and reduce integration risk. For more information on DesignWare IP, visit: http://www.synopsys.com/designware. Follow us on Twitter at http://twitter.com/designware_ip.

About Synopsys

Synopsys, Inc. (NASDAQ:SNPS) is a world leader in electronic design automation (EDA), supplying the global electronics market with the software, intellectual property (IP) and services used in semiconductor design, verification and manufacturing. Synopsys’ comprehensive, integrated portfolio of implementation, verification, IP, manufacturing and field-programmable gate array (FPGA) solutions helps address the key challenges designers and manufacturers face today, such as power and yield management, software-to-silicon verification and time-to-results. These technology-leading solutions help give Synopsys customers a competitive edge in bringing the best products to market quickly while reducing costs and schedule risk. Synopsys is headquartered in Mountain View, California, and has more than 65 offices located throughout North America, Europe, Japan, Asia and India. Visit Synopsys online at http://www.synopsys.com/.

About The MIPI Alliance

The Mobile Industry Processor Interface (MIPI®) Alliance is an open membership organization that includes leading companies in the mobile industry that share the objective of defining and promoting specifications for interfaces in mobile terminals. MIPI Specifications establish standards for hardware and software interfaces typically found in mobile terminals. By defining such standards and encouraging their adoption throughout the industry value chain, the MIPI Alliance intends to reduce fragmentation and improve interoperability among system components, benefiting the entire mobile industry.

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