industry news
Subscribe Now

EVE to Exhibit at ARM Techcon3

Will Highlight ZeBu-Server’s Scalability, Affordability, Speed, Debugging Capabilities

ARM Techcon3
Booth #614
SAN JOSE, Calif.–(BUSINESS WIRE)–EVE, the leader in hardware/software co-verification and developer of ZeBu-Server, a scalable and affordable emulation system, will exhibit at ARM® Techcon3 (Booth #614) October 21-22 at the Santa Clara Convention Center in Santa Clara, Calif.

Capable of handling up to one-billion application specific integrated circuit (ASIC) gates at speeds reaching 30 megahertz (MHz), ZeBu-Server comes equipped with a wide array of tools that enables debugging at multiple levels of abstraction. The ZeBu Smart Debug technology and methodology makes the most effective use of those cycles, allowing “debug convergence” as quickly as possible.

To learn more about EVE, visit www.eve-team.com.

For details on ARM Techcon3, go to: www.armtechcon3.com/2009/.

About EVE

EVE is the worldwide leader in hardware/software co-verification solutions, including hardware description language (HDL) acceleration and extremely fast emulation, with installations at nine of the top 10 semiconductor companies. EVE products significantly shorten the overall verification cycle of complex integrated circuits and electronic systems designs. Its products also work in conjunction with popular Verilog, SystemVerilog, and VHDL-based software simulators from Synopsys, Cadence Design Systems and Mentor Graphics. Follow EVE on Twitter at www.twitter.com/EVETEAM. Its United States headquarters are in San Jose, Calif. Telephone: (408) 457-3200. Facsimile: (408) 457-3299. Corporate headquarters are in Palaiseau, France. Telephone: (33) 1 64.53.27.30. Fax: (33) 1 64.53.27.40. Email: info@eve-team.com. Website: www.eve-team.com.

Leave a Reply

featured blogs
Sep 11, 2024
In which we cogitate, ruminate, and pontificate on the things you can do to further your goal of landing (and keeping) a job in engineering...

featured paper

A game-changer for IP designers: design-stage verification

Sponsored by Siemens Digital Industries Software

In this new technical paper, you’ll gain valuable insights into how, by moving physical verification earlier in the IP design flow, you can locate and correct design errors sooner, reducing costs and getting complex designs to market faster. Dive into the challenges of hard, soft and custom IP creation, and learn how to run targeted, real-time or on-demand physical verification with precision, earlier in the layout process.

Read more

featured chalk talk

Enabling the Evolution of E-mobility for Your Applications
The next generation of electric vehicles, including trucks, buses, construction and recreational vehicles will need connectivity solutions that are modular, scalable, high performance, and can operate in harsh environments. In this episode of Chalk Talk, Amelia Dalton and Daniel Domke from TE Connectivity examine design considerations for next generation e-mobility applications and the benefits that TE Connectivity’s PowerTube HVP-HD Connector Series bring to these designs.
Feb 28, 2024
31,099 views