Fish Fry – Page 39

September 21, 2018

I hope you have your seatbelt low and tight across your waist my friends, because we are flying high into cloud-based design in this week’s episode of Fish Fry! With templates, code, tools, fabs and processes in the cloud cargo hold, Naveed Sherwani (CEO – SiFive), Yunsup Lee (CTO/Founder – SiFive), and I are headed straight into the next generation of silicon design. Also this week, we explore a new project at the European Astronaut Centre that aims to create a new kind of building construction material for buildings and roads on the moon.

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Infinitely Parallel

Metrics Technologies, Verification 3.0, and Why EDA Can’t Ignore the Cloud Any Longer

by Amelia Dalton

September 14, 2018

They say that on a clear day you can see forever. When you look into the clouds, do you see System Verilog? In this week’s episode of Fish Fry, you will! Doug Letcher (CEO and President – Metrics Technologies) joins us to chat about details of the Metrics cloud platform, verification 3.0 and why EDA cannot ignore the Cloud any longer. Also this week, we check out a new robotic backpack developed at Keio University’s Graduate School of Media Design. (Spoiler Alert: It includes robotic hands and arms that are controlled by an Oculus Rift VR … Read More → "Infinitely Parallel"

The Perception Connection

Cepton, Micro-Motion and Seeing is Believing

by Amelia Dalton

September 7, 2018

Hello LiDAR, my old friend. I’ve come to sense with you again. This week’s Fish Fry is all about the what, where, and how of LiDAR technology. Jun Pei (CEO – Cepton Technologies) joins us to discuss the details of Cepton’s Micro-Motion platform and how perception is key to the advancement of autonomous vehicle technology. Also this we check out how a new Kickstarter campaign may change our perception of inductive charging…one cleverly hidden wire at a time.

Not Your Grandfather’s Simulator

Parallel Logic Simulation in Today’s Giga-Gates

by Amelia Dalton

August 31, 2018

In this week’s episode of Fish Fry, Adam Sherer and I explore the past, present, and future of simulation. Adam and I examine how mixed-signal and functionality play into the grand scheme of simulation and why parallel logic simulation is crucial to today’s giga-gate chip design. Also this week, we check out some super cool new programmable, reversible shape-switching technology coming out of the University of Colorado.

Big World, Big Data

Data Centers, RISC-V and AI Cooled Data Centers

by Amelia Dalton

August 24, 2018

“You can have data without information, but you cannot have information without data.” – Daniel Keys Moran

What do RISC-V, data center innovation and artificial intelligence have in common? This week’s podcast of course! Zvonimir Bandic (Western Digital) joins us to discuss how the RISC-V open architecture can inspire innovation in the world of data centers and neural networks. Alexander Redkin (Syntacore) and I chat about Syntacore’s custom RISC-V processor IP and the details of their open source SDK. To wrap things up, we take a closer look at how Google is … Read More → "Big World, Big Data"

Tower of Power

RedHawk Analysis Fusion and Near Threshold Voltage Computing

by Amelia Dalton

August 17, 2018

Power is the name of the game in this week’s episode of Amelia’s Weekly Fish Fry. We’re talking about all things power-related; from “Shift Left” power signoff to the super cool capabilities of near threshold voltage computing. Kenneth Chang (Synopsys) joins us to discuss why power integrity and reliability can make or break chip design and how RedHawk Analysis Fusion can help get your power integrity issues under control earlier (rather than later) in your next design. Also this week, Lauri Koskinen (Minima) and I … Read More → "Tower of Power"

Programmability’s Promise

eFPGAs, FPGA Acceleration, and Machine Learning

by Amelia Dalton

August 10, 2018

Need programmability? Step right up my friends. In this week’s Fish Fry, we are investigating some of the newest and coolest applications using programmable technology today. Ted Marena (Microsemi) demonstrates how we can use PolarFire FPGAs in a machine-learning application and how this PolarFire FPGA-based board can also facilitate Linux and RISC-V development. Sunder Parameswaran (Falcon Computing) also joins us to discuss some really cool applications for FPGA acceleration (like machine learning and genomics!) To finish things up this week, we chat with Kent Orthner from Achronix. Kent and I chat about the rising tide of embedded FPGAs … Read More → "Programmability’s Promise"

Virtual Verification Smorgasbord

Portable Stimulus, UVM models, and Trends in Formal Verification

by Amelia Dalton

August 3, 2018

Pull up a chair. Take a taste. Come join us. Life is so endlessly delicious. — Ruth Reichl

Are you ready for a virtual buffet of verification goodness? I hope so. In this week’s Fish Fry, we’re gobbling down as much verification as we possibly can fit on our podcastin’ plate. First up, Anupam Bakshi (Agnisys) joins us to dish on register specification, automatic memory verification, and UVM model integration. Next, Dave Kelf (Breker) serves up some delectable details about their new Trek Five product, the history of portable stimulus, and how Breker has … Read More → "Virtual Verification Smorgasbord"

The Challenge of Systemic Complexity

Simulation Models for Embedded Software and Smart Monitor IP Blocks

by Amelia Dalton

July 27, 2018

We’re tackling the multi-faceted challenges of embedded software development in this week’s episode of Amelia’s Weekly Fish Fry. Simon Davidmann (CEO – Imperas) joins us to discuss how familiar debug environments can make all the difference in complex designs and why RISC-V architecture is gaining traction in the EE ecosystem. Next up, Rupert Baines (CEO – UltraSoC) joins us to chat about the details of their “Smart Monitor” IP blocks and how they can oversee all the “moving” parts of your design (and keep them all playing nicely together). Also this week, we check out a new wearable … Read More → "The Challenge of Systemic Complexity"

Adventures in Micro Land

TI’s New MSP430 MCU, Nano-Bubbles, and Choosing the Right Capacitor

by Amelia Dalton

July 20, 2018

In this week’s Fish Fry, we’re following a microcontroller yellow brick road to a land where analog reigns supreme. Dave Smith (Texas Instruments) joins us to discuss the details of the “Smart Analog Combo” included in in the MSP430 family, the benefits of the configurable signal-chain elements inherent in this solution, and why the FRAM memory found in this new family sets it apart from other solutions on the market. Also this week, we investigate how “nano-bubbles” are being used … Read More → "Adventures in Micro Land"