Fish Fry – Page 40

July 29, 2016

It’s pitch black. Green lights flash on the horizon. A steady hum pulsates through the alkaline air. Move carefully my friends, we’re in the center of the universe and it’s bound to get a little hot. This week’s Fish Fry is headed to the land where power reigns supreme and the lights are always on: data centers. Robert Blake (CEO – Achronix) joins Fish Fry to discuss the multi-layered relationship between field programmable gate array technology and data centers, what the new Achronix PCI accelerator card is all about, and a little bit about innovation … Read More → "The Need For Speed"

Stand (Tall) and Deliver

Verific Language Parsers and Your Startup Success

by Amelia Dalton

July 20, 2016

Filed under “Don’t Try This at Home” or “Not to be Taken Lightly”, most EDA engineering teams don’t even consider building their own language front end. Most of you will know the name Verific and some probably have used their language parsers a time or two (or twenty), but many of you may not know that Verific also has a robust and comprehensive startup program. In this week’s Fish Fry, Rick Carlson and I chat about how your startup … Read More → "Stand (Tall) and Deliver"

Silicon Without Software is Just Sand

Shifting Left with Imperas and MIT’s Swarm

by Amelia Dalton

July 14, 2016

No one builds a chip without simulation, right? In this week’s Fish Fry, we take a closer look at the value of virtual prototypes to simulate embedded software. Simon Davidmann (CEO – Imperas) and I chat about about why he thinks no one should design embedded software without simulation, and the benefits of using virtual platforms to develop a verification and test environment. Also this week, we investigate a whole new way to design chips, and it’s called Swarm. We examine … Read More → "Silicon Without Software is Just Sand"

Choose Your Own FPGA Adventure

Hard IP, eFPGAs and the Moore's Law Bottleneck

by Amelia Dalton

July 8, 2016

What if you could have your FPGA cake and eat it too? What if you could modify your RTL post-production and have several variations of an algorithm on the same chip? Let me introduce you to eFPGAs. Yoan Dupret from Menta joins Fish Fry this week to discuss the details of Menta’s eFPGAs, the benefits of embedding field programmable gate array fabric as an IP core, and what process geometries are supported by Menta’s eFPGAs. Also this week, Fish Fry welcomes Ramy Iskander from Intento. Ramy and I chat about the challenges of tools … Read More → "Choose Your Own FPGA Adventure"

The Productivity Gap

Lynx Design System Bridges the Breach Between Chip Capacity and Engineering Ability

by Amelia Dalton

July 1, 2016

He’s been up all night. The row of green and white soda cans marks the passage of time in a steady line across his desk. Everyone else has gone home for the day, but he’s still here, clicking “send to voicemail” on his Mom’s call. Nothing, including days without sleep, is going to distract him from his looming deadline. We’ve all been there at least once or twice in our career – burning the engineering candle at both ends, struggling to do more with less. In this week’s Fish Fry, … Read More → "The Productivity Gap"

Are We There Yet?

The Road to 7nm is Paved with Predictive Modeling

by Amelia Dalton

June 24, 2016

Sometimes the road less traveled is less traveled for a reason. (Jerry Seinfeld)

We know what roads will lead us to the 7nm semiconductor node and frankly, they’re not all that scenic. In this week’s Fry Fry, we tackle the trials and tribulations of this tiny titan with David Freid from Coventor. David and I discuss the biggest challenges we will face at this smallest of the small process geometry, how virtual fabrication and predictive modeling can help solve … Read More → "Are We There Yet?"

The Amalgamation Situation

AMD and the Era of Data Convergence

by Amelia Dalton

June 17, 2016

Keep innovation in your back pocket and the end game in your sights at all times. This race is ride or die. The data center waits for no one. Mark Papermaster (CTO – AMD) joins Fish Fry this week to discuss the complex chip competition in the data center market, why open ecosystems are the lynchpin of data center evolution, and why he believes that your product is only as good as your team. Also this week, we take a closer look at how you can maximize your performance-per-watt with Zynq UltraScale+ MPSoCs.

DAC to the Future

IoT, Debug, and Verification at DAC 2016

by Amelia Dalton

June 9, 2016

It’s that time again! This week’s Fish Fry is coming to y’all from the great state of Texas and the heart of the electronic design ecosystem: the Design Automation Conference in Austin. We’re laying out a virtual chuckwagon of DAC bounty. For our first course, we’ll fry up some IP with David Rose of UltraSoC. Next, dig in to delicious debug automation with Read More → "DAC to the Future"

Rugged IoT and Can You Spot the Difference?

Schematics, Design Challenges, and More

by Amelia Dalton

June 3, 2016

Are you ready for a challenge? In this week’s Fish Fry, Greg Roberts introduces us to EMA’s Can You Spot the Difference Contest? where you can win a Raspberry Pi 3 by pitting yourself against OrCAD 17.2 in comparing different schematics. Also this week, Matthias Huber (ADLINK) joins Fish Fry to discuss the challenges of designing rugged IoT systems.

Bridge Over Pixelated Water

CrossLink Changes the Camera Interface Game

by Amelia Dalton

May 26, 2016

We’re talking about the building blocks of electronic design in this week’s Fish Fry. First, we take a closer look at some groundbreaking transistor technology. We investigate new research coming out of the Moscow Institute of Physics and Technology that could finally make graphene tunneling transistors a reality. Also this week, we examine Lattice Semiconductor’s CrossLink pASSP … Read More → "Bridge Over Pixelated Water"