fish fry
Subscribe Now

Digesting Data and Making Our Algorithms Smarter

MEMS, LoRa and the Next Decade of Sensing

In this week’s Fish Fry, we take a closer look at three waves of technological advancement in the MEMS and sensors ecosystem with Marcellino Gemelli of Bosch Sensortec. Marcellino and I discuss what vision, value, and velocity have to do with the next decade of sensor technology, and why more data does not necessarily mean more information. Keeping with our IoT theme this week, Kevin Bromber (CEO – myDevices) also joins Fish Fry to introduce us to the world’s first LoRa™ IoT project builder.  

 

 

Download this episode (right click and save)

Links for December 9, 2016

More information about Bosch Sensortec

More information about myDevices

myDevices Announces Dedicated LoRa™ IoT Project Builder

16 thoughts on “Digesting Data and Making Our Algorithms Smarter”

  1. Pingback: site sell login
  2. Pingback: GVK BIO
  3. Pingback: DMPK Studies
  4. Pingback: Bdsm contract
  5. Pingback: wedding planners
  6. Pingback: Bolide
  7. Pingback: nike hiking boots
  8. Pingback: Cheap

Leave a Reply

featured blogs
Oct 5, 2022
The newest version of Fine Marine - Cadence's CFD software specifically designed for Marine Engineers and Naval Architects - is out now. Discover re-conceptualized wave generation, drastically expanding the range of waves and the accuracy of the modeling and advanced pos...
Oct 4, 2022
We share 6 key advantages of cloud-based IC hardware design tools, including enhanced scalability, security, and access to AI-enabled EDA tools. The post 6 Reasons to Leverage IC Hardware Development in the Cloud appeared first on From Silicon To Software....
Sep 30, 2022
When I wrote my book 'Bebop to the Boolean Boogie,' it was certainly not my intention to lead 6-year-old boys astray....

featured video

PCIe Gen5 x16 Running on the Achronix VectorPath Accelerator Card

Sponsored by Achronix

In this demo, Achronix engineers show the VectorPath Accelerator Card successfully linking up to a PCIe Gen5 x16 host and write data to and read data from GDDR6 memory. The VectorPath accelerator card featuring the Speedster7t FPGA is one of the first FPGAs that can natively support this interface within its PCIe subsystem. Speedster7t FPGAs offer a revolutionary new architecture that Achronix developed to address the highest performance data acceleration challenges.

Click here for more information about the VectorPath Accelerator Card

featured paper

Algorithm Verification with FPGAs and ASICs

Sponsored by MathWorks

Developing new FPGA and ASIC designs involves implementing new algorithms, which presents challenges for verification for algorithm developers, hardware designers, and verification engineers. This eBook explores different aspects of hardware design verification and how you can use MATLAB and Simulink to reduce development effort and improve the quality of end products.

Click here to read more

featured chalk talk

Faster, More Predictable Path to Multi-Chiplet Design Closure

Sponsored by Cadence Design Systems

The challenges for 3D IC design are greater than standard chip design - but they are not insurmountable. In this episode of Chalk Talk, Amelia Dalton chats with Vinay Patwardhan from Cadence Design Systems about the variety of challenges faced by 3D IC designers today and how Cadence’s integrated, high-capacity Integrity 3D IC Platform, with its 3D design planning and implementation cockpit, flow manager and co-design capabilities will not only help you with your next 3D IC design.

Click here for more information about Integrity 3D-IC Platform from Cadence Design Systems