fish fry
Subscribe Now

Locked Up Tight

Security in the New Age of IoT

The recent data breach at VTech brought IoT security issues roaring back into mainstream media, but here at EEJournal we’ve been tackling the perils of IoT security for years. In this week’s Fish Fry, we welcome John Sirianni from Webroot to discuss the current landscape of IoT security, the specific challenges facing OEMs and system engineers when designing Industrial IoT applications, and why he thinks the number of IoT security breaches is increasing. Also this week, we take a look at a groundbreaking new algorithm developed by MIT’s Computer Science and Artificial Intelligence Lab that hopes to solve the not so age-old question: “Is this selfie any good?”

 

 

Download this episode (right click and save)

Links for December 18, 2015

More information about Webroot

More information about LaMEM (Large-scale Image Memorability)

Understanding and Predicting Image Memorability at a Large Scale (whitepaper)

LaMEM Demo 

Fish Fry Executive Interviews

Moshe Gavrielov, CEO – Xilinx

Darrin Billerbeck, CEO – Lattice Semiconductor

Bill Neifert, CTO – Carbon Design Systems

Sean Dart, CEO – Forte Design Systems

Andy Pease, CEO – QuickLogic

Paul Kocher, President – Cryptography Research Inc.

Anupam Bakshi, CEO – Agnisys

Dave Kleidermacher, CTO – Green Hills Software

Robert Blake, CEO – Achronix

Jack Harding, CEO – eSilicon

Michiel Ligthart, COO – Verific

Adnan Hamid, CEO – Breker Technologies

Jeff Waters, VP and General Manager – Altera

Simon Davidmann, CEO – Imperas

Ted Miracco, CEO – SmartFlow Compliance Solutions

Cees Links – GreenPeak Technologies

Leave a Reply

featured blogs
Jun 13, 2024
I've just been introduced to the DuoFlex 4K Dual-Screen Display from HalmaPixel, and now I'm drooling with desire all over my keyboard....

featured video

Unleashing Limitless AI Possibilities with FPGAs

Sponsored by Intel

Industry experts discuss real-world AI solutions based on Programmable Logic, or FPGAs. The panel talks about a new approach called FPGAi, what it is and how it will revolutionize how innovators design AI applications.

Click here to learn more about Leading the New Era of FPGAi

featured paper

Navigating design challenges: block/chip design-stage verification

Sponsored by Siemens Digital Industries Software

Explore the future of IC design with the Calibre Shift left initiative. In this paper, author David Abercrombie reveals how Siemens is changing the game for block/chip design-stage verification by moving Calibre verification and reliability analysis solutions further left in the design flow, including directly inside your P&R tool cockpit. Discover how you can reduce traditional long-loop verification iterations, saving time, improving accuracy, and dramatically boosting productivity.

Click here to read more

featured chalk talk

PIC® and AVR® Microcontrollers Enable Low-Power Applications
Sponsored by Mouser Electronics and Microchip
In this episode of Chalk Talk, Amelia Dalton and Marc McComb from Microchip explore how Microchip’s PIC® and AVR® MCUs are a game changer when it comes to low power embedded designs. They investigate the benefits that the flexible signal routing, core independent peripherals, and Analog Peripheral Manager (APM) bring to modern embedded designs and how these microcontroller families can help you avoid a variety of pitfalls in your next design.
Jan 15, 2024
21,991 views