EEJournal

fish fry
Subscribe Now
October 10, 2014

Shootout at the MEMS Corral

MEMS Executive Congress 2014 Preview
by Amelia Dalton

This week’s Fish Fry celebrates the wild west of electronics – MEMS and sensor-based technology. Ridin’ shotgun with me is none other than Karen Lightman of the MEMS Industry Group. Karen gives us a special sneak peek into the upcoming 10th annual MEMS Executive Congress. I do hope you have your spurs locked on tight, your saddle equipped with the newest context-aware sensors, and your o-scope spit cleaned and polished. We’re riding straight into the MEMS corral. This may get messy…

 

 

Download this episode (right click and save)

Links for October 10, 2014

More information about the MEMS Executive Congress

New Episode of Chalk Talk: What is Electrically Aware Design?

Leave a Reply

featured blogs
Make a DATE with the Young People Programme
Dec 7, 2023
Building on the success of previous years, the 2024 edition of the DATE (Design, Automation and Test in Europe) conference will once again include the Young People Programme. The largest electronic design automation (EDA) conference in Europe, DATE will be held on 25-27 March...
More from Cadence...
The Importance of Memory Architecture for AI SoCs
Dec 7, 2023
Explore the different memory technologies at the heart of AI SoC memory architecture and learn about the advantages of SRAM, ReRAM, MRAM, and beyond.The post The Importance of Memory Architecture for AI SoCs appeared first on Chip Design....
More from Synopsys...
A Haunting World Underwater
Nov 6, 2023
Suffice it to say that everyone and everything in these images was shot in-camera underwater, and that the results truly are haunting....
More from Max's Cool Beans...

featured video

Dramatically Improve PPA and Productivity with Generative AI

Sponsored by Cadence Design Systems

Discover how you can quickly optimize flows for many blocks concurrently and use that knowledge for your next design. The Cadence Cerebrus Intelligent Chip Explorer is a revolutionary, AI-driven, automated approach to chip design flow optimization. Block engineers specify the design goals, and generative AI features within Cadence Cerebrus Explorer will intelligently optimize the design to meet the power, performance, and area (PPA) goals in a completely automated way.

Click here for more information

featured paper

Universal Verification Methodology Coverage for Bluespec RISC-V Cores

Sponsored by Synopsys

This whitepaper explains the basics of UVM functional coverage for RISC-V cores using the Google RISCV-DV open-source project, Synopsys verification solutions, and a RISC-V processor core from Bluespec.

Click to read more

featured chalk talk

Dependable Power Distribution: Supporting Fail Operational and Highly Available Systems
Sponsored by Infineon
Megatrends in automotive designs have heavily influenced the requirements needed for vehicle architectures and power distribution systems. In this episode of Chalk Talk, Amelia Dalton and Robert Pizuti from Infineon investigate the trends and new use cases required for dependable power systems and how Infineon is advancing innovation in automotive designs with their EiceDRIVER and PROFET devices.
Click here for more information about Infineon automotive power distribution modules
Dec 7, 2023
8 views