fish fry
Subscribe Now

Up in ARMs

Processor Optimized IP and Your Next Design

Fish Fry is physical this week. Yep, we’re flexing our SoCs and pulling on our semicodunctor spandex. We may not be running the next design marathon, but we are diving into the world of physical IP. We’re talking to Dipesh Patel (ARM) about processor optimization and how ARM is packing a serious punch with their POP IP.  Also this week, we’re revealing why you don’t have to choose between strictly analog or digital power supplies.

We’re giving away a NXP Development Platform for the DualCore courtesy of Newark element14. Click the link below to enter!


 
 

Click Here to win a NXP Development Platform for the DualCore courtesy of newark element14.

  

Listen to this episode

Download this episode (right click and save)

 

Fish Fry Links – July 5, 2013

More Information about ARM’s POP IP 

New Episode of Chalk Talk – Introducing Digitally Enhanced Power Analog

More Information about this week’s Nerdy Giveway courtesy of newark element14 – NXP Development Platform for the DualCore

Leave a Reply

featured blogs
Apr 25, 2024
Structures in Allegro X layout editors let you create reusable building blocks for your PCBs, saving you time and ensuring consistency. What are Structures? Structures are pre-defined groups of design objects, such as vias, connecting lines (clines), and shapes. You can combi...
Apr 25, 2024
See how the UCIe protocol creates multi-die chips by connecting chiplets from different vendors and nodes, and learn about the role of IP and specifications.The post Want to Mix and Match Dies in a Single Package? UCIe Can Get You There appeared first on Chip Design....
Apr 18, 2024
Are you ready for a revolution in robotic technology (as opposed to a robotic revolution, of course)?...

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Designing Robust 5G Power Amplifiers for the Real World

Sponsored by Keysight

Simulating 5G power amplifier (PA) designs at the component and system levels with authentic modulation and high-fidelity behavioral models increases predictability, lowers risk, and shrinks schedules. Simulation software enables multi-technology layout and multi-domain analysis, evaluating the impacts of 5G PA design choices while delivering accurate results in a single virtual workspace. This application note delves into how authentic modulation enhances predictability and performance in 5G millimeter-wave systems.

Download now to revolutionize your design process.

featured chalk talk

Digi XBee 3 Global Cellular Solutions
Sponsored by Mouser Electronics and Digi
Adding cellular capabilities to your next design can be a complicated, time consuming process. In this episode of Chalk Talk, Amelia Dalton and Alec Jahnke from Digi chat about how Digi XBee Global Cellular Solutions can help you navigate the complexities of adding cellular connectivity to your next design. They investigate how the Digi XBee software can help you monitor and manage your connected devices and how the Digi Xbee 3 cellular ecosystem can help future proof your next design.
Nov 6, 2023
22,627 views