fish fry
Subscribe Now

IGLOO2 to You Too

Fish Fry is headed to the land of programmable logic this week. We’re talking FPGA design tools, flash-enhanced FPGAs, and ASIC designs that won’t break the bank. We’re getting the skinny on Microsemi’s new IGLOO2 family from Paul Ekas, chatting about FPGA partitioning with Flexras CEO Hayder Mrbet, and also checking out how Triad Semiconductor can cut your mixed signal ASIC design costs down to a reasonable and career-preserving amount. 

 

 

Listen to this episode

Download this episode (right click and save)

Fish Fry Links – June 21, 2013

More Information about Microsemi’s new IGLOO2 FPGA Family

Feature Article – Building a Bigger Better IGLOO: Microsemi Goes Mainstream

More Information about Flexras

New Episode of Chalk TalkHDHow to Save 99% on Your Next Mixed Signal ASIC Design

Leave a Reply

featured blogs
Feb 20, 2020
Although I've been exposed to some amazing things in academic and research settings, I can't recall seeing anything this versatile in the public domain....
Feb 19, 2020
AI/ML at DVCon: From Theory to Application  Bringing Hierarchy to DFT Formal Flow for Automotive Safety  Todd Westerhoff on the Value of Solid Design Skills Siemens develops validation program to accelerate AV development AI/ML at DVCon: From Theory to Application M...
Feb 15, 2020
[From the last episode: We looked in more detail at the characteristics of threads.] Last week we ended with a question: we'€™re talking about threads running at the same time, in parallel, but'€¦ if you have only one CPU, how would that even work? That'€™s totally not ...
Feb 13, 2020
J.R. Bonnefoy, Systems Engineer at Samtec, walks us through a live product demonstration of a 70 GHz, high-performance test point system. This demo, from DesignCon 2020, incorporates two new high-performance products.  The demo is based on Samtec'€™s 56 Gbps PAM4 Produ...

Featured Video

Industry’s First USB 3.2 Gen 2x2 Interoperability Demo -- Synopsys & ASMedia

Sponsored by Synopsys

Blazingly fast USB 3.2 Gen 2x2 are ready for your SoC. In this video, you’ll see Synopsys and ASMedia demonstrate the throughput available with Synopsys DesignWare USB 3.2 IP.

Learn more about Synopsys USB 3.2