Springtime in the SoC

Audio IP, Static Analysis and Board Member Switch-a-roo

by Amelia Dalton

In honor of the Design Automation Conference that is less than a month away, I take a little foray into the mysterious land of tools. First up, I chat with Henk Hamoen (Synopsys) about how Synopsys is working its way into audio IP, and then it’s an interview with Mark Zarins of GrammaTech about static code analysis and why your level of comfort in dealing with abstraction is important to them. Finally, I have a special “News You May Have Missed” segment about some recent rumblings on the Mentor Graphics Board of Directors.

Also this week, I have a brand new nerdy giveaway (a TI MSP-EXP430FR5739 Experimenter Board) courtesy of Mouser to throw your way, but you’ll have to tune in to find out how to win.

Fish Fry Links – May 11, 2012

More Information about Synopsys’s Audio IP Subsystem

More Information about GrammaTech

Carl Icahn’s Letter to Mentor Graphics

More Information about the recent the changes to the Mentor Graphics’s Board of Directors (Marketwatch)

More Information about John Cooley’s (DeepChip.com) coverage of the changes to the Mentor Graphics’s Board of Directors

More Information about the TI MSP-EXP430FR5739 Experimenter Board courtesy of Mouser

Chiplet Architecture Accelerates Delivery of Industry-Leading Intel® FPGA Features and Capabilities

Sponsored by Intel

With each generation, packing millions of transistors onto shrinking dies gets more challenging. But we are continuing to change the game with advanced, targeted FPGAs for your needs. In this video, you’ll discover how Intel®’s chiplet-based approach to FPGAs delivers the latest capabilities faster than ever. Find out how we deliver on the promise of Moore’s law and push the boundaries with future innovations such as pathfinding options for chip-to-chip optical communication, exploring new ways to deliver better AI, and adopting UCIe standards in our next-generation FPGAs.

To learn more about chiplet architecture in Intel FPGA devices visit https://intel.ly/45B65Ij

An Automated Method for Adding Resiliency to Mission-Critical SoC Designs

Sponsored by Synopsys

Adding safety measures to SoC designs in the form of radiation-hardened elements or redundancy is essential in making mission-critical applications in the A&D, cloud, automotive, robotics, medical, and IoT industries more resilient against random hardware failures that occur. This paper discusses the automated process of implementing the safety mechanisms/measures (SM) in the design to make them more resilient and analyze their effectiveness from design inception to the final product.

Click here to read more

featured chalk talk

Secure Authentication ICs for Disposable and Accessory Ecosystems

Sponsored by Mouser Electronics and Microchip

Secure authentication for disposable and accessory ecosystems is a critical element for many embedded systems today. In this episode of Chalk Talk, Amelia Dalton and Xavier Bignalet from Microchip discuss the benefits of Microchip’s Trust Platform design suite and how it can provide the security you need for your next embedded design. They investigate the value of symmetric authentication and asymmetric authentication and the roles that parasitic power and package size play in these kinds of designs.

Click here for more information about the Microchip Technology DM320118 CryptoAuth Trust Platform Kit

Jul 21, 2023

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Springtime in the SoC

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Featured Video

Chiplet Architecture Accelerates Delivery of Industry-Leading Intel® FPGA Features and Capabilities

featured paper

An Automated Method for Adding Resiliency to Mission-Critical SoC Designs

featured chalk talk