Migrating Complex Networking ASIC Verification Environment to SystemC and SystemVerilog
Introduction
As the computer hardware industry strives to obey Moore’s Law, the telecommunication industry is following the even more rapid phenomena as described by Metcalfe’s Law: the potential number of contacts between each end computer increases rapidly, the effort to reduce the congestion at the network layer is greatly contributing to today’s system-on-chip (SoC) complexity. As more and more optimizations are added to the upper layer protocols, low layer complexity increases to facilitate overall system feasibility. Over the past decade, we have witnessed a dramatic increase in … Read More → "Migrating Complex Networking ASIC Verification Environment to SystemC and SystemVerilog"

