In today’s digital studio, video format conversion is challenging and time consuming, yet necessary. Learn about an easy method for up-conversion, down-conversion, and cross-conversion of SD and HD video streams.

Watch this 8-minute … Read More → "Accelerate Your Video Format Conversion Using 1080p Framework"

Altera’s new Transceiver Signal Integrity Development Kit, Stratix® IV GX Edition, enables a thorough evaluation of the transceiver’s interoperability and SERDES signal integrity.  This 8-minute video demonstrates the performance differences between 3-inch and 40-inch board traces and how pre-emphasis dramatically improves signal quality.  You’ll also learn what a “bit-error ratio” is and why it’s important as well as how to monitor power consumption through the kit’s GUI.

In this 4-minute video, check out Altera’s 40-nm Stratix IV FPGA demos showcasing 1.5-Gbps LVDS performance and an 8.5-Gbps transceiver operating with excellent signal integrity. You’ll watch eye diagrams demonstrating very low jitter, and how pre-emphasis and equalization improve signal integrity and allow for very long traces.

In this 6-minute video you’ll see how Stratix III FPGAs support SGMII GigE operation on LVDS I/O pins at 1.25 Gbps. With Stratix III FPGAs, you can build communications systems requiring single or multiple (up to 96) Ethernet links quickly and simply while meeting jitter and tolerance requirements. SGMII GigE operation is available on fast, mid-range and industrial speed grade devices.

Altera’s proprietary Programmable Power Technology enables the Stratix® III logic fabric to consume less core power than Virtex-5 when implementing the same design. In this 4-minute video, you’ll see a side-by-side comparison and how Stratix III FPGAs allow for the lowest possible power consumption without compromising performance.

Stratix® III FPGAs, with their proprietary built-in I/O circuitry, reduce the challenges of high-speed DDR3 memory design. Watch this 4-minute demo to see how easy it is to interface 1,067 Mbps DDR3 memories to Stratix III FPGAs while maintaining optimal signal integrity at very high data rates. Stratix III FPGAs feature robust DDR3 write-leveling for interfacing with high-speed DDR3 memory and provide I/O circuitry that is capable of high speeds and greater flexibility to support existing and emerging external memory standards.

With the introduction of cutting-edge touch screen products, the demand for multi-touch user-machine interfaces is growing. Adding multi-touch to a wide variety of products—from cell phones and MP3 players to medical imaging equipment and even washing machines—may be easier than you think. This webcast shows a very cost-effective way to add multi-touch to your system using Altera’s MAX® II CPLDs and surprisingly simple IP. The first part of the webcast will review current touch screen technologies and their strengths and … Read More → "Upgrade Your System’s Resistive Touch Screen to Multi-Touch"

For broadcast and Pro A/V applications, PCI Express (PCIe) Gen2 offers the increased bandwidth needed to support the move to 1080p60 content and enables video applications to follow the IT industry’s transition to the new standard. This webcast discusses Altera’s 4-channel solution for bridging 3G Triple-Rate SDI to PCIe Gen2.