Teradici Success Story
November 17, 2009
Synopsys and Teradici: ASIC Prototyping Made Fast and Efficient with Synplify Premier.
… Read More → "Teradici Success Story"5 Reasons to Use a Soft-Core MIPS Processor in Your Next Custom Design
November 17, 2009
Now there’s a 100 percent MIPS-compatible soft processor available just for Altera® FPGAs and HardCopy® ASICs. The MP32 is also the industry’s first soft processor that runs the VxWorks operating system.
Watch this 10-minute video to learn five reasons why you should use MP32 in your next custom embedded design. You’ll also see:
- Read More → "5 Reasons to Use a Soft-Core MIPS Processor in Your Next Custom Design"
FPGA Configuration via Protocol
November 17, 2009
Altera’s new device configuration mode – configuration via protocol (CvP) – can be used with PCI Express® to configure the core fabric of Altera’s 28-nm Arria® V, Cyclone® V, and Stratix® V FPGAs. CvP can reduce product cost and board size, while simplifying the software usage model, and providing robust in-field system upgrade capability. In addition, the autonomous, embedded PCIe IP core helps ensure that designs meet PCIe power-up time requirements, irrespective of the FPGA … Read More → "FPGA Configuration via Protocol"
Enabling High-Performance DSP with Arria V or Cyclone V Variable-Precision DSP Block
November 17, 2009
With many advanced applications in the market today requiring high and varying precisions, implementing complex digital signal processing (DSP) can be a challenge. Altera’s innovative variable-precision DSP blocks not only support high-performance signal processing, but also the unique precision requirements of your signal processing designs.
Watch this webcast to find out more about the variable-precision DSP blocks in our 28-nm Arria®Read More → "Enabling High-Performance DSP with Arria V or Cyclone V Variable-Precision DSP Block"
Enable High-Performance DSP with Variable-Precision DSP Blocks
November 17, 2009
DSP designs use hundreds or thousands of multipliers as basic building blocks to implement filters, fast Fourier transforms (FFTs), and encoders that digitally process signals. This document highlights the benefits of variable-precision DSP architecture in Altera’s new Arria® V and Cyclone® V FPGAs. Altera’s variable precision DSP block allows designers to tailor the precision on a block-by-block basis, thereby saving resources and power while increasing performance.
Author: & … Read More → "Enable High-Performance DSP with Variable-Precision DSP Blocks"
4 Reasons Why FPGAs are Right for Motor Control
November 17, 2009
Did you know that you can build a flexible and scalable motor control system in a single FPGA?
Watch this 6-minute video to:
- Learn about the 4 reasons why FPGAs are right for motor control
- How implementing a simple feedback mechanism can synchronize two motors
- Read More → "4 Reasons Why FPGAs are Right for Motor Control"
Optimize Motor Control Designs with an Integrated FPGA Design Flow (REVISED)
November 17, 2009
This white paper describes a recommended design flow that leverages Altera® FPGAs’ adaptability, variable-precision digital signal processing (DSP), and integrated system-level design tools for motor control designs. Designers of industrial motor-driven equipment can take advantage of the performance, integration, and efficiency benefits of this design flow.
… Read More → "Optimize Motor Control Designs with an Integrated FPGA Design Flow (REVISED)"Basics of Programmable Logic Online Training
November 17, 2009
This training will give you a basic introduction to programmable logic devices, focusing on FPGAs. By exploring the history of programmable logic technologies, you’ll learn about the architectural features that make up an FPGA. You will see the advantages of using FPGAs for digital logic design. Finally, you’ll understand how design software makes it easy to create and implement digital logic designs.
By the end of this course, you will be able … Read More → "Basics of Programmable Logic Online Training"
Title (CHALK TALK)
November 17, 2009
Lorem ipsum dolor sit amet, consectetur adipiscing elit. Suspendisse feugiat orci interdum lorem ultricies sed tempor dolor gravida. Proin semper ligula in lacus convallis elementum. Praesent eu enim sed lectus egestas volutpat sed consequat velit. Integer non erat arcu, at tempor nibh. Class aptent taciti sociosqu ad litora torquent per conubia nostra, per inceptos himenaeos. Donec ut felis nisl. Nam sed elit erat, posuere scelerisque leo. Mauris eget nunc … Read More → "Title (CHALK TALK)"
EasyPath-6 FPGAs Deliver Lowest Total Product Cost in Six Weeks
November 17, 2009
Confused about FPGA cost reduction? There are easy options for even the most sophisticated FPGAs. Join Amelia Dalton and Shekhar of Xilinx in this Chalk Talk about cost-reducing your Virtex FPGA design with EasyPath.
Speaker: Shekhar, Marketing Director, FPGA Cost Reduction, Xilinx
… Read More → "EasyPath-6 FPGAs Deliver Lowest Total Product Cost in Six Weeks"
featured blogs
Aug 18, 2025
When I grew up in the 1960s, the technologies of the time seemed incredibly advanced. Now, in hindsight (the one exact science), I choose to think of them as being "delightfully retro."...