The density of FPGAs has grown with each process node shrink. Compared to previous generations of FPGAs, the extra density, coupled with features such as reconfiguration, enables designers to add to or change the functionality of these devices. FPGAs provide the perfect platform for accommodating improvements and design changes in functionality because of the reconfiguration feature. However, for some applications such as the 100G-OTN … Read More → "Increasing Design Functionality with Partial and Dynamic Reconfiguration in 28nm FPGAs"

Ever wonder whether the challenges of using partial reconfiguration are worth the benefits? Now, there’s an easy-to-use, fine-grain partial reconfiguration methodology that delivers lower cost and power and higher system uptime. What’s more, you don’t need to understand the intricacies of FPGA architecture to get more usable density from your device.

View this 15-minute webcast to learn how:

Read More → "Learn About Easier-to-Use Partial Reconfiguration Flow"

Based on announcements from vendors, enterprises and service providers,100G system deployment is finally gaining real traction in the marketplace. The primary driver for this deployment is the customers’ ceaseless demand for higher bandwidth. Various standard bodies are working to ratify the emerging 100G standards … Read More → "Optical Transport Networks for 100G Implementation in FPGAs"

Introduction

Earlier prediction and treatment are driving the fusion of modalities such as positron emission tomography (PET)/computerized tomography (CT) and X-ray/CT equipment. The higher image resolutions that are needed require fine geometry micro-array detectors coupled with sophisticated software/hardware systems for the analysis of photonic and electronic signals. These systems must provide both highly accurate and extremely fast processing of large amounts of image data (up to 250 GMACS and 1 Gbps). … Read More → "Medical Imaging Implementation Using FPGAs"

This white paper explains PCB layout guidelines for designing LVDS boards using Altera FPGAs. LVDS is a high-speed, low-voltage, low-power, and low-noise general-purpose I/O interface standard. The low-voltage swing and differential current mode outputs significantly reduce EMI and have fast edge rates that cause signal paths to act as transmission lines. Therefore, ultra-high-speed board design and differential signal theory knowledge is especially useful for designing an FPGA-based LVDS board.

Wouldn’t you like an integrated solution that makes developing broadcast infrastructure equipment easier and faster? Watch this new 9-minute video to learn about two development kits and reference designs that do just this.

You will: