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Minimal Intel® Architecture Boot Loader: Bare Bones Functionality Required for Booting an Intel® Architecture Platform

When you want to write your own BIOS on an Intel® architecture platform, you must gather the appropriate documents and determine the order in which the listed items must be performed. Until now there has not been a single document that describes all the … Read More → "Minimal Intel® Architecture Boot Loader: Bare Bones Functionality Required for Booting an Intel® Architecture Platform"

Processing Multiple Buffers in Parallel to Increase Performance

SIMD, or Single Instruction Multiple Data, is an established technique for boosting performance on processors that handle identical workloads. On Intel® processors, multiple independent data buffers can be processed simultaneously using SIMD instructions and registers. The multi-buffer approach can accelerate certain algorithms, such as AES-CBC-Encrypt and 3DES, where SIMD instructions do not exist, and where data dependencies prevent the optimal use of the processor’s execution resources.

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Designing Real-Time Solutions on Embedded Intel® Architecture Processors

One of the major challenges in embedded designs is the ability to exhibit “real-time” determinism. This paper focuses on some of the key design considerations associated with real-time embedded solutions. It introduces a number of the advanced features in Intel® architecture processors and describes real-time considerations and recommendations.

A “Real-time system is one which has a constraint on the time permitted for the system& … Read More → "Designing Real-Time Solutions on Embedded Intel® Architecture Processors"

Upgrading Intel® AMT 5.0 Linux Drivers to Kernel v2.6.31for Intel Q45 and Intel GM45 based Embedded Platforms

Intel® Active Management Technology (Intel® AMT) is a hardware-based solution that provides Out of Band (OOB) remote manageability functions that are independent of the system’s power and operating system (OS) state.

The two components of Intel AMT that allow interaction between the Intel® AMT client and the OS are the Manageability Engine Interface (MEI) device driver and the Local Manageability  … Read More → "Upgrading Intel® AMT 5.0 Linux Drivers to Kernel v2.6.31for Intel Q45 and Intel GM45 based Embedded Platforms"

Debugging Machine Check Exceptions on Embedded IA Platforms

Embedded systems must be able to detect, recover from and report errors. This is a critical feature during debugging and also for quality control after product manufacturing has commenced. Advanced error handling is especially important for embedded systems that are often manufactured in large unit volumes and must run mission-critical applications non-stop for extended periods of time.

This white paper describes Machine Check Architecture, a … Read More → "Debugging Machine Check Exceptions on Embedded IA Platforms"

Guaranteeing Silicon Performance with FPGA Timing Models

Altera® timing models provide a simple and easy way to verify the timing of FPGA designs without the need to perform full physical electrical extractions and simulations. The three different operating corners available for 65-nm and newer FPGAs provide a thorough coverage of the time delays within the recommended operating conditions.

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Implementing FIR Filters and FFTs with 28nm Variable-Precision DSP Architecture

Across a range of applications, the two most common functions implemented in FPGA-based high-performance signal processing are finite impulse response (FIR) filters and fast Fourier transforms (FFTs). The FPGA’s digital signal processing (DSP) architecture must be optimized to allow the most efficient implementation of these structures as this directly translates into cost and power benefits to the customer. This white paper introduces the DSP architecture of the latest 28-nm Altera® FPGAs and shows how this … Read More → "Implementing FIR Filters and FFTs with 28nm Variable-Precision DSP Architecture"

Single-Event Effect Mitigation in RTAX-DSP Space-Flight FPGAs

Introduction

When high-energy ions present in space strike the substrate of an IC, their impact can cause momentary current/voltage pulses in the IC’s circuitry. When these pulses are sufficient to change the data on the circuit, they are referred to collectively as single-event effects (SEEs). Two subclasses of SEEs were of … Read More → "Single-Event Effect Mitigation in RTAX-DSP Space-Flight FPGAs"

Simpler, Smarter Platform for Differentiated Digital TVs

The Spartan-6 FPGA Consumer Video kit provides a simpler way to update and modify video algorithms, and incorporate new video standards such as DisplayPort and V-by-One-HS. The advanced integrated design environment allows designers to efficiently develop and test high speed serial interfaces like LVDS and TMDS and debug HDMI or DVI-based solutions. The Spartan-6 FPGA Consumer Video Kit offers everything designers need to implement features for today and tomorrow’s market.

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Virtex-6HXT Lab Demo

This video shows a quick lab demo of the Virtex-6HXT, the industry’s highest bandwidth FPGA, featuring 24GTH transceivers (11+Gb/s) AND GTX transceivers (6.6Gb/s) for a total of 72 Transceivers.

This FPGA combines the world’s highest performance FPGA fabric with the world’s highest performance serial transceivers, sampling now! 

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featured blogs
Feb 6, 2026
In which we meet a super-sized Arduino Uno that is making me drool with desire....