Increasing bandwidth requirements for broadband services are driving silicon vendors to use more and more high-speed serial transceivers. Therefore, next-generation applications feature a wide range of data rates, from a few Mbps to hundreds of Gbps, and integrate multiple protocols and services in a single box. Quickly evolving standards like … Read More → "Innovating With a Full Spectrum of 40-nm FPGAs and ASICs With Transceivers"

Metastability is a phenomenon that can cause system failure in digital devices when a signal is transferred between circuitry in unrelated or asynchronous clock domains. This paper describes metastability in FPGAs, explains why the phenomenon occurs, and discusses how it causes design failures. The MTBF due to metastability indicates whether steps should be taken to reduce the chance of such failures. This paper explains how MTBF is calculated, and how both vendors and designers can increase it.

Read More → "Understanding Metastability in FPGAs"

This white paper describes the SATA and SAS protocols, how the protocols are used, explains the value SATA and SAS in terms of usage in an FPGA, and illustrates how Altera FPGAs can be used to develop a SATA or SAS solution. SATA and SAS are computer bus standards that have the primary function of transferring data (directly or otherwise) between the motherboard and mass storage devices (such as hard disk drives, optical drives, and solid-state disks) inside … Read More → "Understanding 40-nm FPGA Solutions for SATA/SAS"

The global estimated loss to counterfeiting is expected to exceed U.S.$1.5 trillion in 2009. Counterfeiting impacts all businesses in all markets, from Gucci handbags to computer chips to proprietary algorithms. The threats to companies’ intellectual property (IP) grow as the global supply chain becomes increasingly complex. Security and protection in the global supply chain is critical to maintaining a competitive advantage, while in some cases it is required just to stay in business.

Read More → "Protecting the FPGA Design From Common Threats"

Electronic systems designers use FPGAs for their prototype implementations, taking advantage of the devices’ reprogrammability to validate hardware and software. Once the design is ready for volume production, certain types of ASICs help the designers meet power, performance, and cost targets. This paper discusses the evolution, architecture, and capabilities of Altera HardCopy ASICs as a package- and pin-compatible FPGA counterpart that is ideal for taking designs into volume production.

… Read More → "Generating Functionally Equivalent FPGAs and ASICs With a Single Set of RTL and Synthesis/Timing Constraints"

Altera’s 2008 launch of the Stratix IV and HardCopy IV device families marked the introduction of the world’s first 40-nm FPGAs and the industry’s only risk-free path to 40-nm ASICs. The event culminated over three years of exhaustive planning and development to deliver custom logic devices exhibiting uncompromised product leadership. Altera’s subsequent announcement in 2009 of Arria II GX and Stratix IV GT FPGA families results in the industry’s most comprehensive transceiver-product portfolio.

Read More → "Leveraging the 40-nm Process Node to Deliver the World’s Most Advanced Custom Logic Devices"

When a certain web-enabled multimedia smartphone hit the market in 2007, it transformed the way that consumers interact with their handheld devices. Especially engaging is the fluid touch-screen interface that allows users to access an array of applications or scroll through web pages with their fingertips. To develop such sophisticated interfaces with high I/O counts, ease of use, low power, and flexibility to support product differentiation, design with zero-power Altera MAX IIZ CPLDs.

… Read More → "Developing Multipoint Touch Screens and Panels With CPLDs"

Altera’s flash memory configuration controller provides an alternative configuration solution for high-density FPGA-based designs. With the flexibility to use a bigger flash memory to store more configuration data, designers can implement the flash memory controller in Altera’s MAX® II, MAX 3000A, or MAX 7000 devices for use in Stratix series, Arria series, and Cyclone series FPGAs.

Introduction</ … Read More → "MAX Series Configuration Controller Using Flash Memory"

With the advent of low-power CPLDs, low-power electronic product designers now have new options for implementing many of the functions traditionally performed by microcontrollers. This white paper discusses when it is advantageous to use a CPLD instead of a microcontroller, and when it makes sense to use a CPLD as a companion to a microcontroller.

Introduction</ … Read More → "Six Ways to Replace a Microcontroller With a CPLD"

Modulating LED power based on ambient light level increases battery life, a particularly helpful feature in devices where battery life is measured in days. Using a very simple circuit, Altera’s MAX II and MAX IIZ CPLDs can measure the analog light level of their environments and then drive an LED at a proportional analog intensity level. Controlling the LED … Read More → "Using LEDs as Light-Level Sensors and Emitters"