MOUNTAIN VIEW, Calif., July 27 /PRNewswire-FirstCall/ — Get Smart at Actel Corporation (NASDAQ:ACTL) and Avnet Memec’s SpeedWay Design Workshops highlighting SmartFusion™intelligent mixed signal FPGAs. The workshops will help designers understand the key features and benefits of SmartFusion devices. SmartFusion intelligent mixed signal FPGAs integrate an FPGA, ARM® Cortex™-M3 processor, and programmable analog, offering full customization, IP protection and ease-of-use.

Workshop Topics:

• Hard 32-bit ARM Cortex-M3 processor
• SoftConsole Eclipse-based IDE
• Microcontroller subsystem components
• Libero® IDE for FPGA designs (Synplicity and ModelSim)</ … Read More → "Get Smart With Design Workshops Highlighting SmartFusion FPGAs"

SAN JOSE, Calif., July 27 /PRNewswire/ — Xilinx, Inc. (NASDAQ:XLNX) today announced the availability of its fourth generation partial reconfiguration design flow and new improvements to its intelligent clock gating technology that deliver a 24 percent reduction in dynamic block-RAM (BRAM) power consumption in Virtex®-6 FPGA designs. Designers can download ISE® Design Suite 12.2 today to take advantage of an easier-to-use, intuitive partial reconfiguration design flow as well as take further steps to reduce power consumption and reduce overall system costs. … Read More → "Xilinx Improves Design Flow for Industry’s Only Proven Partial Reconfiguration FPGA Technology with ISE Design Suite 12.2"

SAN JOSE, Calif., July 27 /PRNewswire/ — Xilinx, Inc. (NASDAQ:XLNX) today announced the availability of its fourth generation partial reconfiguration design flow and new improvements to its intelligent clock gating technology that deliver a 24 percent reduction in dynamic block-RAM (BRAM) power consumption in Virtex®-6 FPGA designs. Designers can download ISE® Design Suite 12.2 today to take advantage of an easier-to-use, intuitive partial reconfiguration design flow as well as take further steps to reduce power consumption and reduce overall system costs. … Read More → "Xilinx Improves Design Flow for Industry’s Only Proven Partial Reconfiguration FPGA Technology with ISE Design Suite 12.2"

CONCORD, CA – JULY 27, 2010 — D-Tools Inc., the worldwide leader in system integration software today announced that detailed information on the entire family of Sonance and iPort products have been recently updated in D-Tools product database, better enabling D-Tools System Integrator™ users to specify Sonance and iPort for any size project. 

With distribution in over 70 countries, Sonance remains at the forefront of technology by offering innovative design solutions that harmoniously blend sound with designs favored by leading custom integrators, architects, interior-design professionals, and design-conscious clients throughout the world. 

“We are … Read More → "Sonance’s Product Line Now Updated In D-Tools System Integrator (SI) 5.5 Software"

MOUNTAIN VIEW, Calif. July 27 Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Oticon taped out the digital signal processor (DSP) chipset for their next generation hearing-aid devices ahead of schedule using Synopsys’ Design Compiler(tm) Graphical RTL Synthesis, a key component of the Galaxy™ implementation platform. Engineers at Oticon, a world leader in the design, development and manufacture of hearing aids, needed to add new features to the next generation DSP without increasing design area and while maintaining a very tight schedule. This was especially … Read More → "Synopsys’ Design Compiler Graphical shortens design schedule at Oticon"

MOUNTAIN VIEW, Calif. July 27 Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Oticon taped out the digital signal processor (DSP) chipset for their next generation hearing-aid devices ahead of schedule using Synopsys’ Design Compiler(tm) Graphical RTL Synthesis, a key component of the Galaxy™ implementation platform. Engineers at Oticon, a world leader in the design, development and manufacture of hearing aids, needed to add new features to the next generation DSP without increasing design area and while maintaining a very tight schedule. This was especially … Read More → "Synopsys’ Design Compiler Graphical shortens design schedule at Oticon"

SAN JOSE, Calif., July 26, 2010 — Magma® Design Automation (Nasdaq: LAVA), a provider of chip design software, today announced that Telairity, a supplier of innovative video compression solutions, has adopted the FineSim™ SPICE circuit simulator. Telairity is using FineSim SPICE to design innovative real-time video compression integrated circuits (ICs) and selected it because FineSim delivers SPICE-accurate results significantly faster than competitive products. 

Read More → "Telairity Selects Magma’s FineSim SPICE to Accelerate Circuit Simulation of Video Compression ICs"