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New XMC Module Mates Configurable Virtex-5 FPGA with High-Speed PCIe Interface and Deep Memory

WIXOM, Mich.Oct. 13 /PRNewswire/ — Acromag’s new XMC FPGA module, the XMC-VLX, features a configurable Xilinx Virtex-5 FPGA enhanced with multiple high-speed memory buffers and a high-throughput PCIe interface. Field I/O interfaces to the FPGA via the rear J4/P4 connector and/or with optional front mezzanine plug-in I/O modules. The result is a powerful and flexible I/ … Read More → "New XMC Module Mates Configurable Virtex-5 FPGA with High-Speed PCIe Interface and Deep Memory"

Opal-RT Extends Capabilities of Real-Time Simulators with the Launch of RT-LAB 10.1

MONTREAL, Oct. 12 /PRNewswire/ — Opal-RT Technologies (www.opal-rt.com), the leading developer of open Real-Time Simulators and HIL testing systems for electrical, mechanical and fast-switching power electronic systems, today launched RT-LAB 10.1, the latest version of the core technology behind the company’s flagship Real-Time Simulator products including eDRIVEsimeMEGAsimeFLYsimand the < … Read More → "Opal-RT Extends Capabilities of Real-Time Simulators with the Launch of RT-LAB 10.1"

Synopsys CustomSim Selected by GSI Technology for High-Speed SRAM Simulation

MOUNTAIN VIEW, Calif., Oct. 13 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that GSI Technology, a leader in high-density, high-speed monolithic SRAMs, has selected Synopsys’ CustomSim™ FastSPICE solution for the development and verification of its leading-edge designs. GSI Technology’s 144-megabit (Mbit) SigmaQuad SRAMs achieve data bandwidths in excess of 72 gigabits per second (Gbps). In order to maximize yield with such aggressive timing specifications, extensive full-chip transistor-level simulations need to be run over multiple process, voltage and temperature corners. CustomSim delivered confirmed silicon-accurate results while simulating … Read More → "Synopsys CustomSim Selected by GSI Technology for High-Speed SRAM Simulation"

Seven and Counting

We can’t believe it’s been seven years.

We started FPGA Journal in the wildest days of the emergence of programmable logic.  The technology had been around for over a decade, but the drama had just begun.  FPGAs had finally outgrown the “glue logic” label and were rapidly becoming effective platforms for system integration.  ASIC gates in a socket – counting NRE, unit cost, tools, design time, risk, and engineering resources – had stopped getting cheaper, and for many applications they were getting more expensive.  FPGA … Read More → "Seven and Counting"

100 Tapeouts Underscore Rapid and Broad Acceptance of Synopsys’ In-Design Physical Verification

MOUNTAIN VIEW, Calif., Oct. 12 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that its award-winning Galaxy™ Implementation Platform product, IC Validator, for In-Design physical verification within IC Compiler, has been successfully used for more than 100 tapeouts at advanced process nodes. Coming so soon after IC Validator’s 2009 launch, this milestone is a strong indicator of the requirement for a different physical verification use model. In contrast to the traditional stand-alone physical verification approach performed at the end of the design cycle, the new In-Design approach is … Read More → "100 Tapeouts Underscore Rapid and Broad Acceptance of Synopsys’ In-Design Physical Verification"

New Lattice “Platform Manager” Transforms Board Power And Digital Management

HILLSBORO, OR  OCTOBER 12, 2010  Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced its third-generation mixed-signal devices, the Platform Manager™ family.  The programmable Platform Manager devices are expected to simplify board management design significantly by integrating programmable analog and logic to support many common functions, such as power management, digital housekeeping and glue logic.  By integrating these support functions, Platform Manager devices can not only reduce the cost of these functions compared to traditional approaches, but also can improve system reliability and provide a high degree … Read More → "New Lattice “Platform Manager” Transforms Board Power And Digital Management"

Altera Launches Embedded Initiative with New System Level Integration Tool for Embedded Systems Configurability

SAN JOSE, Calif.Oct. 12 /PRNewswire/ — To accelerate the integration of programmable logic and processors in embedded systems, Altera Corporation (Nasdaq: ALTR) today announced its Embedded Initiative. With this initiative, Altera is providing designers a single FPGA design flow based on its Quartus® II development software—including the new Qsys system-level integration tool, a common FPGA intellectual property (IP) library, and new ARM® Cortex™-A9 … Read More → "Altera Launches Embedded Initiative with New System Level Integration Tool for Embedded Systems Configurability"

Opal-RT Launches New FPGA-based Reconfigurable I/O and FPGA Development System Integrated with Simulink and RT-LAB

MONTREAL, Oct. 12 /PRNewswire/ — Opal-RT Technologies (www.opal-rt.com), the leading developer of open Real-Time Simulators and HIL testing systems for electrical, mechanical and fast-switching power electronic systems, today introduced new additions to the company’s OP5000 family of FPGA-based I/O and signal conditioning hardware.

These new products include:

Lattice Announces Update To ispLever FPGA Design Tool Suite

HILLSBORO, OR – OCTOBER 12, 2010 – Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of Service Pack 1 for Version 8.1 of its ispLEVER®FPGA design tool suite.  Service Pack 1 is an important update for designers targeting mid-range LatticeECP3™ devices using the ispLEVER tool suite.

Updated Support for the LatticeECP3 FPGA Family

Service Pack 1 updates the device values to production characterized … Read More → "Lattice Announces Update To ispLever FPGA Design Tool Suite"

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